{"id":2697019,"url":"https://alion.io/job/keysight-app-dev-engrscient-inter","title":"App Dev Engr/Scient, Inter","company":{"id":53596,"name":"Keysight","domain":"keysight.com","url":"https://alion.io/company/keysight","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Jibe","truth_index":{"grade":"A","score":85,"open_postings":111,"ghost_share":0,"stale_share":0.586,"repost_share":0,"time_to_fill_p50_days":46,"computed_at":"2026-10-16T05:45:00Z"}},"role":"Hardware","role_family":"Hardware","seniority":"middle","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Noida, India"],"countries":["IN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":18500,"max_usd":44000,"period":"year","method":"global_role_cell_scaled_by_country","sample_n":723},"experience_years_min":3,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Cadence Xcelium","optional":false},{"name":"Python","optional":false},{"name":"Synopsys Design Compiler","optional":false},{"name":"SystemVerilog","optional":false},{"name":"Verilog","optional":false}],"status":"live","first_seen_at":"2026-07-14T01:20:00Z","employer_posted_date":"2026-10-16","last_verified_at":"2026-10-16T19:05:52Z","board_verified":true,"closed_at":null,"days_open":94,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":94},"description":"OverviewKeysight is at the forefront of technology innovation, delivering breakthroughs and trusted insights in electronic design, simulation, prototyping, test, manufacturing, and optimization. Our ~16,800 employees create world-class solutions in communications, 5G, automotive, energy, quantum, aerospace, defense, and semiconductor markets for customers in over 100 countries. Learn more about what we do.\nOur award-winning culture embraces a bold vision of where technology can take us and a passion for tackling challenging problems with industry-first solutions. We believe that when people feel a sense of belonging, they can be more creative, innovative, and thrive at all points in their careers.\nAbout the Role\nPowerArtist is a leading RTL power analysis and optimization platform widely adopted across top semiconductor and SoC companies for early power estimation and debug. With increasing industry focus on low-power design and faster tape-outs, PowerArtist plays a critical role in enabling early power closure and design efficiency.\nThis position offers strong customer visibility, exposure to advanced SoC programs, and the opportunity to work closely with leading semiconductor customers to drive power optimization/estimation success.\nThis role focuses on product validation, feature qualification, and Application Engineering (AE) backend support. You will work closely with Product Development, Application Engineering, and key semiconductor customers to validate new capabilities, reproduce and analyze customer-reported issues, develop comprehensive validation strategies, and enable rapid issue resolution. The position offers broad exposure to advanced SoC design flows, strong cross-functional collaboration, and the opportunity to directly influence product quality, customer success, and future feature development.\nResponsibilities\nKey Responsibilities:\nValidate new PowerArtist features, enhancements, and bug fixes across diverse design environments and customer use cases.\nDevelop and maintain feature validation test plans, design suites.\nPerform functional, performance, and quality verification of RTL power analysis flows.\nReproduce, analyze, and debug customer-reported issues in collaboration with R&D and AE teams.\nCreate testcases to verify bug fixes and ensure no regressions are introduced.\nValidate support for new technologies, libraries, simulators, synthesis tools, and waveform formats.\nAnalyze RTL power estimation results and verify accuracy against expected behavior.\nAutomate validation workflows, regression execution, and result analysis using scripting.\nProvide backend technical support to AE teams by investigating complex customer issues and identifying root causes.\nCollaborate closely with R&D during feature development cycles to improve product quality and usability.\nSupport release qualification activities and ensure timely delivery of high-quality product releases.\nQualifications\nRequired Skills:\n3+ years of experience in RTL design, verification, power analysis, or EDA tool validation.\nStrong understanding of RTL (Verilog/SystemVerilog) and digital design fundamentals.\n\nFamiliarity with AI/ML and Generative AI technologies, including their application in EDA workflows, validation automation, regression analysis, testcase generation, and productivity enhancement.\n\nHands-on experience with PowerArtist or RTL power estimation and analysis methodologies.\nKnowledge of switching activity formats (VCD, FSDB, SAIF) and power modeling concepts.\nFamiliarity with dynamic power, clock power, and activity-based power estimation techniques.\nExperience debugging RTL power analysis flows, libraries, constraints, and waveform-related issues.\nKnowledge of synthesis tools (Design Compiler, Genus) and simulation environments (VCS, Xcelium, Questa).\nStrong debugging, root-cause analysis, and log investigation skills.\nProficiency in TCL, Shell, and/or Python scripting for automation and regression development.\nAbility to work effectively with R&D and AE teams in diagnosing and resolving complex technical issues.\nStrong written and verbal communication skills with an emphasis on technical documentation.\nCareers Privacy Statement ***Keysight is an Equal Opportunity Employer.***\nKey Responsibilities:\nValidate new PowerArtist features, enhancements, and bug fixes across diverse design environments and customer use cases.\nDevelop and maintain feature validation test plans, design suites.\nPerform functional, performance, and quality verification of RTL power analysis flows.\nReproduce, analyze, and debug customer-reported issues in collaboration with R&D and AE teams.\nCreate testcases to verify bug fixes and ensure no regressions are introduced.\nValidate support for new technologies, libraries, simulators, synthesis tools, and waveform formats.\nAnalyze RTL power estimation results and verify accuracy against expected behavior.\nAutomate validation workflows, regression execution, and result analysis using scripting.\nProvide backend technical support to AE teams by investigating complex customer issues and identifying root causes.\nCollaborate closely with R&D during feature development cycles to improve product quality and usability.\nSupport release qualification activities and ensure timely delivery of high-quality product releases.\nRequired Skills:\n3+ years of experience in RTL design, verification, power analysis, or EDA tool validation.\nStrong understanding of RTL (Verilog/SystemVerilog) and digital design fundamentals.\n\nFamiliarity with AI/ML and Generative AI technologies, including their application in EDA workflows, validation automation, regression analysis, testcase generation, and productivity enhancement.\n\nHands-on experience with PowerArtist or RTL power estimation and analysis methodologies.\nKnowledge of switching activity formats (VCD, FSDB, SAIF) and power modeling concepts.\nFamiliarity with dynamic power, clock power, and activity-based power estimation techniques.\nExperience debugging RTL power analysis flows, libraries, constraints, and waveform-related issues.\nKnowledge of synthesis tools (Design Compiler, Genus) and simulation environments (VCS, Xcelium, Questa).\nStrong debugging, root-cause analysis, and log investigation skills.\nProficiency in TCL, Shell, and/or Python scripting for automation and regression development.\nAbility to work effectively with R&D and AE teams in diagnosing and resolving complex technical issues.\nStrong written and verbal communication skills with an emphasis on technical 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