{"id":2256388,"url":"https://alion.io/job/keysight-digital-signal-processing-asic-rd-engineer","title":"Digital Signal Processing ASIC R&D Engineer","company":{"id":53596,"name":"Keysight","domain":"keysight.com","url":"https://alion.io/company/keysight","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Jibe","truth_index":null},"role":"Hardware","role_family":"Hardware","seniority":null,"employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Leuven, Belgium"],"countries":["BE"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":null,"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Git","optional":false},{"name":"Linux","optional":false},{"name":"MATLAB","optional":false},{"name":"Python","optional":false},{"name":"SystemC","optional":false},{"name":"Verilog","optional":false},{"name":"VHDL","optional":false}],"status":"live","first_seen_at":"2026-09-02T09:09:00Z","employer_posted_date":"2026-10-11","last_verified_at":"2026-10-12T01:12:29Z","board_verified":true,"closed_at":null,"days_open":39,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":39},"description":"OverviewKeysight is at the forefront of technology innovation, delivering breakthroughs and trusted insights in electronic design, simulation, prototyping, test, manufacturing, and optimization. Our ~16,800 employees create world-class solutions in communications, 5G, automotive, energy, quantum, aerospace, defense, and semiconductor markets for customers in over 100 countries. Learn more about what we do.\nOur award-winning culture embraces a bold vision of where technology can take us and a passion for tackling challenging problems with industry-first solutions. We believe that when people feel a sense of belonging, they can be more creative, innovative, and thrive at all points in their careers.\nThis job opening is with the Keysight Hardware Labs ASIC Team in Leuven, Belgium (EU). We're conveniently located right next to the Leuven railway station.\nKeysight Labs is a central R&D organization, enabling Keysight to be first to market with breakthrough products and solutions.\nDigital Signal Processing (DSP) and Mixed Signal Application Specific ICs (ASICs), tailor-made at Keysight Labs, are a major success factor for the company and continue to drive the performance and value of Keysight's new products.\nIn our team the Applied Research & Development for these ASICs is the core of our specialty and expertise.\nBringing the algorithm to silicon is what we do daily.\nResponsibilities\nWe have an exciting job opportunity for a Digital Signal Processing ASIC R&D Engineer.\nYou will be developing cutting edge designs among some of the best talent in industry. You will be working in an international team, playing a significant role in exploring and designing DSP algorithms and Digital Designs, using state-of-the-art Electronic Design Automation (EDA) tools, directly impacting the key specs of Keysight's future products.\nAs member of the ASIC teamyour Major Responsibilities will be:\nTo research, design and verify digital / DSP and mixed signal ASICs that meet Test & Measurement product functionality, quality, and schedule requirements, supervised by the project’s technical lead.\nTo code, verify and document your designs, and to synthesize and iterate them to timing closure with state-of-the-art EDA tools.\nQualifications\nYou hold a master’s degree or PhD in either Electronics and Chip Design, Information Systems and Signal Processing, Computer Sciences, Applied Physics or equivalent.\nYou have a full professional working proficiency in both spoken and written English.\nYou have a Belgian Work Permit.\nIt's a plus if you have experience with any of the following (or you are willing to learn soon):\nMatlab, Python, SystemC..\nThe ASIC and/or FPGA design and verification process i.e.:RTL design entry (VHDL or Verilog).\nRTL simulation (Mentor, Cadence, ...).\nLogic Synthesis and Timing Closure (Synopsys, Cadence).\n\nLinux \nGit\nElementary professional working proficiency in Dutch.\nPersonal Qualities:\nYou demonstrate strong and clear communication, analysis, and problem-solving skills.\nYou have a strong affinity with Digital Design, Engineering Mathematics and Digital Signal Processing.\nYou are an avid programmer e.g. in Python.\nYou have a proven track record as a team player. \nYou show design creativity, and you are always eager to learn.\nYou’re self-reliant, flexible and show a can-do attitude.\nYou are committed to work accurately, delivering high quality results, on time.\nCareers Privacy Statement ***Keysight is an Equal Opportunity Employer.***\nWe have an exciting job opportunity for a Digital Signal Processing ASIC R&D Engineer.\nYou will be developing cutting edge designs among some of the best talent in industry. You will be working in an international team, playing a significant role in exploring and designing DSP algorithms and Digital Designs, using state-of-the-art Electronic Design Automation (EDA) tools, directly impacting the key specs of Keysight's future products.\nAs member of the ASIC teamyour Major Responsibilities will be:\nTo research, design and verify digital / DSP and mixed signal ASICs that meet Test & Measurement product functionality, quality, and schedule requirements, supervised by the project’s technical lead.\nTo code, verify and document your designs, and to synthesize and iterate them to timing closure with state-of-the-art EDA tools.\nYou hold a master’s degree or PhD in either Electronics and Chip Design, Information Systems and Signal Processing, Computer Sciences, Applied Physics or equivalent.\nYou have a full professional working proficiency in both spoken and written English.\nYou have a Belgian Work Permit.\nIt's a plus if you have experience with any of the following (or you are willing to learn soon):\nMatlab, Python, SystemC..\nThe ASIC and/or FPGA design and verification process i.e.:RTL design entry (VHDL or Verilog).\nRTL simulation (Mentor, Cadence, ...).\nLogic Synthesis and Timing Closure (Synopsys, Cadence).\n\nLinux \nGit\nElementary professional working proficiency in Dutch.\nPersonal Qualities:\nYou demonstrate strong and clear communication, analysis, and problem-solving skills.\nYou have a strong affinity with Digital Design, Engineering Mathematics and Digital Signal Processing.\nYou are an avid programmer e.g. in Python.\nYou have a proven track record as a team player. \nYou show design creativity, and you are always eager to learn.\nYou’re self-reliant, flexible and show a can-do attitude.\nYou are committed to work accurately, delivering high quality results, on time.\nCareers Privacy Statement ***Keysight is an Equal Opportunity Employer.***","description_format":"text","description_chars":5555,"description_truncated":false,"requirements":{"experience_years_min":null,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"master","optional":false},"security_clearance":false,"languages":[{"language":"Dutch","level":"Upper-Intermediate (B2)","optional":false},{"language":"English","level":"All levels","optional":false}]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Simulation & Digital Twin Software","Custom Software Development"],"lifecycle":[{"event":"open","at":"2026-10-11T03:56:46Z"}],"visa":[],"liveness":{"score":15,"band":"cold","label":"Long shot","p_open":1,"p_active":0.443,"p_room":0.35,"age_days":39,"expected_fill_days":14,"reasons":["conf:2","win:tail","comp:brand"],"computed_at":"2026-10-12T04:05:24Z"},"pay":null,"html_url":"https://alion.io/job/keysight-digital-signal-processing-asic-rd-engineer","json_url":"https://alion.io/job/keysight-digital-signal-processing-asic-rd-engineer.json","meta":{"generated_at":"2026-10-12T04:05:24Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":6417,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-13T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":53596},"rest":"https://alion.io/mcp/rest/get_company?id=53596"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fkeysight-digital-signal-processing-asic-rd-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fkeysight-digital-signal-processing-asic-rd-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fkeysight-digital-signal-processing-asic-rd-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/keysight-digital-signal-processing-asic-rd-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fkeysight-digital-signal-processing-asic-rd-engineer"}]}