{"id":1272624,"url":"https://alion.io/job/knowledge-artisan-principal-analog-mixed-signal-engineer","title":"Principal Analog Mixed Signal Engineer","company":{"id":3800696,"name":"Knowledge Artisans","domain":"theknowledgeartisans.com","url":"https://alion.io/company/knowledge-artisan","size_band":null,"is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":null,"truth_index":null},"role":"Hardware","role_family":"Hardware","seniority":"lead","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Thiruvananthapuram, India","Bengaluru, India"],"countries":["IN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":24000,"max_usd":56000,"period":"year","method":"global_role_cell_scaled_by_country","sample_n":741},"experience_years_min":12,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Cadence Spectre","optional":false},{"name":"Cadence Virtuoso","optional":false},{"name":"MATLAB","optional":false},{"name":"Perl","optional":false},{"name":"Python","optional":false},{"name":"Simulink","optional":false},{"name":"Synopsys HSPICE","optional":false},{"name":"Verilog","optional":false}],"status":"live","first_seen_at":"2026-09-01T06:35:40Z","employer_posted_date":null,"last_verified_at":"2026-09-01T06:35:40Z","board_verified":false,"closed_at":null,"days_open":54,"trust":{"level":"not_scored","repost_count":null,"flags":[],"days_open":54},"description":"About the Client :\n\nOur client is a leading global engineering and technology services organization specializing in product engineering, digital transformation, semiconductor engineering, embedded systems, and next-generation technology solutions. The organization works with leading global technology and product companies across industries such as automotive, semiconductor, communications, consumer electronics, industrial automation, and other high-technology domains. \n\nWith strong capabilities across the semiconductor product development lifecycle, the organization supports customers in areas including ASIC/SoC design, analog and mixed-signal engineering, embedded systems, verification, physical design, silicon validation, and product engineering.\n\nAbout the Role :\n\nWe are looking for a highly experienced Principal Analog Mixed Signal Engineer with 12 - 18 years of relevant experience in Analog and Mixed Signal IC/ASIC/SoC development. The successful candidate will take ownership of Analog/Mixed Signal IP and subsystem development from architecture through silicon and production, including circuit design, verification, layout supervision, tape-out, silicon bring-up, characterization, and production support. This is a senior technical leadership position requiring a combination of : Deep hands-on Analog/Mixed Signal design expertise, strong understanding of semiconductor development methodologies, multiple successful silicon tape-outs, end-to-end IP/SoC ownership, silicon validation and debugging experience, technical team leadership and mentoring, customer-facing communication, and cross-functional collaboration. The ideal candidate should be capable of making critical architectural and circuit-level decisions, driving technical reviews, mentoring senior engineers, and working directly with customers and internal engineering teams.\n\nKey Responsibilities :\n\n1. Technical Leadership :\n\n- Own Analog/Mixed Signal IP and subsystem development from concept to production.\n\n- Define system-level and block-level architecture for AMS solutions.\n\n- Establish technical roadmaps, design methodologies, and development strategies.\n\n- Lead architecture reviews, design reviews, and technical decision-making.\n\n- Evaluate design trade-offs related to performance, power, area, reliability, and cost.\n\n- Provide technical direction to Analog/Mixed Signal design engineers.\n\n- Mentor and guide engineers across different experience levels.\n\n- Establish and drive engineering best practices.\n\n- Identify technical risks early and develop mitigation strategies.\n\n- Drive continuous improvements in design quality, methodology, and productivity.\n\n- Support project estimation, planning, technical reviews, and milestone tracking.\n\n2. Analog & Mixed Signal Circuit Design :\n\n- The candidate should have strong hands-on experience designing and leading development of several Analog/Mixed Signal blocks, including :\n\n1. Clocking & Timing Circuits : PLL, DLL, Oscillators, Clock generation circuits, Clock conditioning circuits, Charge pumps.\n\n2. Data Conversion : ADC, DAC, Comparators, References and bias circuits.\n\n3. Power Management : LDOs, Bandgap references, Power management circuits, Bias generation, Low-power analog circuits.\n\n4. High-Speed & Interface Circuits : High-speed interface analog blocks, SerDes-related analog blocks, PHY-related analog blocks, MIPI / USB / PCIe / DDR PHY exposure.\n\n5. Sensor & Monitoring : Sensor interfaces, Monitoring circuits, Calibration circuits, Detection and protection circuits.\n\n- The candidate should be comfortable working at both architecture and transistor/circuit levels, depending on project requirements.\n\n3. End-to-End IP / SoC Product Ownership :\n\n- Take technical ownership across the complete Analog/Mixed Signal development lifecycle : \n\nRequirements - Architecture - Circuit Design - Simulation - Verification - Layout - Post-Layout - Signoff - Tape-out - Silicon Bring-up - Characterization - Production.\n\n- Analyze customer/product requirements.\n\n- Perform feasibility studies and technical risk assessments.\n\n- Define system and circuit architecture.\n\n- Select appropriate circuit topologies and design approaches.\n\n- Drive transistor-level implementation and optimization.\n\n- Review simulation results and design margins.\n\n- Ensure compliance with performance specifications.\n\n- Coordinate with layout engineers and physical design teams.\n\n- Supervise layout implementation and conduct layout reviews.\n\n- Review parasitic extraction results.\n\n- Drive post-layout simulation and closure.\n\n- Ensure AMS signoff readiness.\n\n- Participate in tape-out reviews and tape-out activities.\n\n- Support silicon bring-up and debugging.\n\n- Correlate pre-silicon simulations with silicon measurements.\n\n- Drive characterization and performance analysis.\n\n- Support production ramp-up, qualification, and yield improvement.\n\n4. Analog/Mixed Signal Verification & Signoff :\n\n- Define verification strategy and acceptance criteria.\n\n- Develop appropriate simulation plans for Analog/Mixed Signal blocks.\n\n- Review simulation coverage and corner coverage.\n\n- Perform and review : PVT analysis, Corner analysis, Monte Carlo analysis, Mismatch analysis, Noise analysis, Reliability analysis, Post-layout simulations.\n\n- Analyze process, voltage, and temperature variations.\n\n- Ensure adequate design margins.\n\n- Identify performance degradation caused by process variation and parasitics.\n\n- Drive design closure against specifications.\n\n- Support final AMS signoff and tape-out readiness.\n\n5. Physical Verification & Layout :\n\n- The candidate should be able to effectively review and guide : Analog layout, Matching-sensitive layouts, Common-centroid structures, Guard-ring strategies, Power and ground implementation, Noise isolation, DRC, LVS, ERC, Parasitic extraction, Post-layout simulation, Layout-dependent effects.\n\n6. Silicon Bring-Up & Validation :\n\n- Lead or support first-silicon bring-up.\n\n- Develop silicon validation and characterization strategies.\n\n- Debug silicon issues at the circuit/IP/system level.\n\n- Correlate silicon measurements against simulation results.\n\n- Identify root causes of silicon performance gaps.\n\n- Recommend circuit/design corrections.\n\n- Support engineering change and redesign activities where required.\n\n- Analyze characterization data.\n\n- Support yield improvement initiatives.\n\n- Participate in product qualification and production ramp-up.\n\n7. Customer & Cross-Functional Interaction :\n\n- Participate in customer technical discussions.\n\n- Understand customer requirements and translate them into technical solutions.\n\n- Present architecture and design approaches.\n\n- Communicate technical risks, trade-offs, and project status.\n\n- Participate in customer design reviews.\n\n- Collaborate with Digital Design RTL/Verification, Physical Design, Analog Layout, Packaging, DFT, Test Engineering, Product Engineering, Silicon Validation, Program/Project Management teams.\n\nRequired Technical Skills :\n\n1. Analog Design Tools :\n\n- Strong practical experience with industry-standard Analog/Mixed Signal design environments : Cadence Virtuoso, Cadence Spectre / Spectre APS, Cadence ADE XL, Cadence ADE Explorer, Cadence ADE Assembler, HSPICE, MATLAB, Simulink.\n\n2. AMS Verification Skills :\n\n- Strong understanding and practical experience in: Analog/Mixed Signal verification, Verilog-A, Verilog-AMS, Mixed-Signal simulation, PVT analysis, Corner analysis, Monte Carlo simulation, Mismatch analysis, Noise analysis, Reliability analysis, Post-layout simulation, AMS signoff.\n\n3. Physical Verification Skills :\n\n- Experience with DRC, LVS, ERC, Parasitic extraction, RC extraction, Post-layout simulation, Layout review and closure.\n\n4. Process Technology Experience :\n\n- Experience across CMOS process technologies ranging from 180nm to advanced nodes.\n\n- Strong understanding of process-related design considerations.\n\n- Experience working with technology scaling and associated analog design challenges.\n\n- Knowledge of FinFET technologies is an advantage.\n\n- Understanding of process variation, device mismatch, parasitics, leakage, noise, and reliability considerations.\n\n5. Preferred Technical Exposure :\n\n- Candidates with experience in one or more of the following areas will be preferred : SerDes, MIPI, USB, PCIe, DDR PHY, High-speed interfaces, Sensor interfaces, Automotive electronics, Industrial electronics, Safety-critical semiconductor products, Low-power Analog/Mixed Signal design, Power management, Productization, Yield improvement.\n\n6. Functional Safety & Reliability :\n\n- Preferred knowledge includes : ISO 26262, IEC 61508, Functional safety concepts, Reliability-aware analog design, Safety mechanisms, Diagnostic/monitoring circuits, Automotive semiconductor development processes.\n\n7. Scripting & Automation :\n\n- Preferred : Python, Perl, TCL, Simulation automation, Design-flow automation, Regression automation.\n\nRequired Qualifications :\n\n- B.E./B.Tech/M.E./M.Tech in Electronics Engineering, Electrical Engineering, VLSI, Microelectronics, Electronics & Communication Engineering or a related engineering discipline.\n\n- 12 - 18 years of relevant Analog/Mixed Signal IC design experience.\n\n- Strong hands-on Analog/Mixed Signal circuit design experience.\n\n- Proven experience with multiple successful silicon tape-outs.\n\n- Strong experience across the ASIC/SoC development lifecycle.\n\n- Experience in silicon bring-up and characterization.\n\n- Ability to lead technical teams and drive design decisions.\n\n- Strong customer-facing and cross-functional communication skills.\n\nIdeal Candidate Profile :\n\nThe ideal candidate is a senior Analog/Mixed Signal technical leader who combines deep circuit-design expertise with end-to-end semiconductor product ownership. We are particularly interested in professionals who have 12 - 18 years of AMS design experience, multiple successful tape-outs, strong transistor-level design expertise, experience owning AMS IP from architecture to silicon, strong Cadence Virtuoso/Spectre expertise, hands-on AMS verification experience, strong knowledge of PVT, Monte Carlo, mismatch, noise, and reliability analysis, experience with DRC/LVS/ERC and parasitic extraction, silicon bring-up and characterization experience, experience leading or mentoring engineering teams, customer-facing technical experience, and exposure to automotive, industrial, or safety-critical products.\nSkills\nAnalog Mixed Signal, ASIC, SoC, Circuit Design, Clock Domain Crossing, Sensor, Board Bring Up, RTL, Physical Design, AMS Verification","description_format":"text","description_chars":10580,"description_truncated":false,"requirements":{"experience_years_min":12,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":null,"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":[],"lifecycle":[{"event":"open","at":"2026-09-26T00:07:01Z"}],"visa":[],"liveness":{"score":11,"band":"cold","label":"Long shot","p_open":0.4,"p_active":0.601,"p_room":0.45,"age_days":53,"expected_fill_days":27,"reasons":["seen:53","velocity","win:tail"],"computed_at":"2026-10-25T05:49:26Z"},"pay":null,"html_url":"https://alion.io/job/knowledge-artisan-principal-analog-mixed-signal-engineer","json_url":"https://alion.io/job/knowledge-artisan-principal-analog-mixed-signal-engineer.json","meta":{"generated_at":"2026-10-25T16:42:24Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":24123,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-26T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":3800696},"rest":"https://alion.io/mcp/rest/get_company?id=3800696"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fknowledge-artisan-principal-analog-mixed-signal-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fknowledge-artisan-principal-analog-mixed-signal-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fknowledge-artisan-principal-analog-mixed-signal-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/knowledge-artisan-principal-analog-mixed-signal-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fknowledge-artisan-principal-analog-mixed-signal-engineer"}]}