Sr Engineer, FPGA

1. Understands customer’s specification and writes design documents;

理解客户需求，完成设计文档

2.Performs source code(Verilog) design, simulation and functional validation;

代码设计、仿真和功能验证

3. Supports to solve the problem of existing products; Supports production manufacture and solves the problems in manufacture line;

支持现有产品分析解决问题，支持产线生产、解决问题

4. Performs other related duties as assigned by PM and manager.

完成其他分配的任务

5. Reviews source code and design documents, ensures the correctness and standardization.

评审代码和文档，保证一致性和标准化

6. Provides guidance to logic engineer in development.

为logic工程师提供开发指导

SCOPE:

支持现有产品和新产品的研发

EDUCATION/教育程度:

Bachelor’s degree in engineering in communication/information Engineering

通信相关专业的本科学历

PREFERRED/优先考虑:

Master’s degree in engineering in communication/information Engineering

通信相关专业的研究生学历

WORK EXPERIENCE/工作经验:

5+ years design experience

五年以上工作经验

PREFERRED/优先考虑:

Design experience of optical communication products

光通讯相关产品经验

SKILLS & ABILITIES/技能与能力:

Proficient in Verilog programming;

Knowledge of hardware and software design

Have good knowledge of resources and features on FPGA or CPLD chips, such as Xilinx FPGA and Lattice FPGA;

Familiar with IIC, SPI, QSPI, UART, LOCAL BUS protocol, AXI BUS.

Familiar with oscilloscope, network analyser, frequency spectrum analyser etc.;

Good verbal and written skills for exchange of information in a clear and concise manner;

Demonstrated ability to work effectively within a team environment.

精通verilog

了解硬件和软件设计基本知识

熟悉Xilinx和lattice FPGA/CPLD片上资源和相关功能

熟悉常用通信协议比如IIC/SPI/UART/LBC/AXI

熟悉各种设备的使用比如示波器/网络分析仪/频谱分析仪

良好的口头和书面技能，以清晰简洁的方式交流信息

良好的团队合作能力

PREFERRED/优先考虑:

Knowledge about the optical communication module, such as EDFA, OCM, WSS etc.;

Knowledge of OTN/PTN line card logic design;

Knowledge of Serdes application, such as SGMII/PCIe.

Good expression skills and good spoken English level.

有光通讯模块知识，比如EDFA/OCM/WSS等

有OTN/PTN线卡设计经验

有高速信号设计经验，比如SGMII/PCIe

良好的英语写作和表达能力