{"id":3780523,"url":"https://alion.io/job/l3harris-technologies-lead-electrical-engineer-6","title":"Lead, Electrical Engineer","company":{"id":177017,"name":"L3Harris Technologies","domain":"l3harris.com","url":"https://alion.io/company/l3harris-technologies","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"SuccessFactors","truth_index":{"grade":"A","score":100,"open_postings":48,"ghost_share":0,"stale_share":0.021,"repost_share":0.042,"time_to_fill_p50_days":21,"computed_at":"2026-11-06T05:58:05Z"}},"role":"Hardware","role_family":"Hardware","seniority":"lead","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Alpharetta, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":null,"experience_years_min":9,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Bash","optional":false},{"name":"C++","optional":false},{"name":"Cameo Systems Modeler","optional":false},{"name":"DO-254","optional":false},{"name":"Git","optional":false},{"name":"IBM DOORS","optional":false},{"name":"Jira","optional":false},{"name":"Linux","optional":false},{"name":"MBSE","optional":false},{"name":"Perl","optional":false},{"name":"Python","optional":false},{"name":"Siemens QuestaSim","optional":false},{"name":"Synplify Pro","optional":false},{"name":"SystemVerilog","optional":false},{"name":"UVM","optional":false},{"name":"Verilog","optional":false},{"name":"VHDL","optional":false},{"name":"Xilinx Vivado","optional":false}],"status":"live","first_seen_at":"2026-11-05T00:44:34Z","employer_posted_date":"2026-11-04","last_verified_at":"2026-11-05T12:54:40Z","board_verified":true,"closed_at":null,"days_open":1,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":1},"description":"Job Title: Lead, FPGAFirmware Verification Engineer \nJob Code: 46971\nJob Location: Alpharetta, GA\nJob Schedule: 9/80: Employees work 9 out of every 14 days- totaling 80 hours worked- and have every other Friday off\nJob Description:\nL3Harris is seeking a hands-on Lead, FPGA Firmware Verification Engineer to provide technical leadership and execute FPGA verification activities for mission-critical aerospace and defense products.\nThis role combines simulation development, regression execution, hardware integration and laboratory testing with leadership of verification efforts supporting DO-254 compliance. The successful candidate will develop and enhance verification environments, debug simulation and hardware issues, and align verification activities, documentation, and deliverables with program requirements and schedules.\nThe ideal candidate brings strong FPGA design and verification experience, knowledge of DO-254 processes, excellent analytical and laboratory skills, and the ability to communicate technical issues and solutions clearly. This individual will collaborate across engineering disciplines and geographically distributed teams within Advanced Mission Technologies to deliver high-quality products to our customers.\nEssential Functions:\nProvide hands-on technical leadership for FPGA verification, including verification planning, testbench development, simulation, regression testing, hardware testing, and results analysis.\nDevelop, maintain, and execute verification environments using VHDL, Verilog, SystemVerilog, Universal Verification Methodology (UVM), and assertion-based verification, as applicable.\nReview requirements for clarity, completeness, and verifiability; develop requirements-based verification procedures and maintain traceability between requirements, tests, and results.\nSupport DO-254 verification activities, including preparation and review of verification plans, procedures, results, coverage analyses, and supporting lifecycle documentation.\nDevelop and enhance scalable simulation environments, automated regressions, and scripting infrastructure to improve verification efficiency and repeatability.\nAnalyze verification coverage, identify gaps, and drive resolution of discrepancies and outstanding verification objectives.\nGuide and perform laboratory integration and hardware verification, including troubleshooting FPGA behavior and correlating hardware results with simulations.\nAssist verification engineers in debugging testbenches, simulations, and hardware issues; provide technical mentoring and promote consistent verification practices.\nWork with FPGA development and verification tools, including AMD/Xilinx Vivado and legacy ISE 14.7, Synplify, Intel/Altera Quartus, and Siemens QuestaSim, as applicable to assigned programs.\nCoordinate with project engineering, program management, systems engineering, hardware engineering, software engineering, and certification stakeholders across multiple locations.\nAlign verification priorities, resources, documentation, and deliverables with program cost and schedule objectives; assess cost, schedule, and resource impacts; recommend mitigation strategies and identify decisions or approvals needed to support execution.\nProvide timely technical status, identify execution risks and variances, and develop updated estimates to complete for newly identified in-scope work.\nUse L3Harris-approved AI tools, where authorized, to support requirements analysis, verification development, debugging, and documentation, while independently validating outputs and protecting sensitive information.\nMaintain configuration-controlled verification artifacts using applicable revision control, requirements management, and issue-tracking tools.\nLearn and apply new tools, technologies, and verification methods as program needs evolve.\nQualifications:\nBachelor’s degree and a minimum of nine (9) years of prior relevant experience; graduate degree and a minimum of seven (7) years of prior related experience; or, in lieu of a degree, a minimum of thirteen (13) years of prior related experience.\nDemonstrated experience in FPGA design and/or verification, including simulation development, debugging, and hardware verification.\nExperience with SystemVerilog, VHDL, UVM, Assertions, constrained-random verification, functional coverage, code coverage, and linting.\nExperience supporting DO-254 Design Assurance Level A programs and associated certification evidence and requirements-based verification.\nPreferred Additional Skills:\nVerification and Design Assurance\nExperience supporting airworthiness certification activities involving MIL-HDBK-516C and applicable guidance, including AC 17-01.\nExperience using C/C++ for FPGA or ASIC verification and reference-model development.\nExperience with model-based systems engineering (MBSE) and Cameo\nFPGA Architectures and Interfaces\nExperience with AMD/Xilinx and/or Intel/Altera FPGA architectures, including Kintex UltraScale/UltraScale+, Virtex UltraScale/UltraScale+, and Zynq UltraScale+ MPSoC devices.\nExperience with high-speed serial interfaces and packet-based protocols, including PCI Express, Serial RapidIO, Ethernet, and Fibre Channel, plus 10 Gigabit Ethernet network interface designs and network protocols including IPv6 and UDP.\nExperience with high-speed DDR memory interfaces.\nTools, Automation and Documentation\nProficiency with FPGA development and verification tools such as Vivado, Quartus, QuestaSim, Synplify, and/or legacy ISE 14.7, plus Linux environments and scripting languages such as Python, Perl, Bash, or C shell.\nExperience with Git or Subversion for configuration management, Jira for issue tracking, and requirements management tools such as Jama or IBM DOORS.\nStrong technical writing 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