{"id":3994310,"url":"https://alion.io/job/l3harris-technologies-scientist-software-engineering-2","title":"Scientist, Software Engineering","company":{"id":177017,"name":"L3Harris Technologies","domain":"l3harris.com","url":"https://alion.io/company/l3harris-technologies","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"SuccessFactors","truth_index":{"grade":"A","score":100,"open_postings":53,"ghost_share":0,"stale_share":0.019,"repost_share":0.038,"time_to_fill_p50_days":21,"computed_at":"2026-11-09T06:03:00Z"}},"role":"Hardware","role_family":"Hardware","seniority":"staff","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Salt Lake City, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":null,"experience_years_min":16,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Bitbucket","optional":false},{"name":"C#","optional":false},{"name":"C++","optional":false},{"name":"Git","optional":false},{"name":"Siemens ModelSim","optional":false},{"name":"SystemVerilog","optional":false},{"name":"UVM","optional":false},{"name":"Verilog","optional":false},{"name":"VHDL","optional":false},{"name":"Xilinx Vivado","optional":false}],"status":"live","first_seen_at":"2026-11-10T00:37:31Z","employer_posted_date":"2026-11-09","last_verified_at":"2026-11-10T00:37:31Z","board_verified":true,"closed_at":null,"days_open":0,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":0},"description":"Job Title: Scientist, Software Engineering (FPGA Design) \nJob ID: Req ID 47447\nJob Location: Salt Lake City, UT\nJob Schedule: 9/80: Employees work 9 out of every 14 days - totaling 80 hours worked - and have every other Friday off\nJob Description:\nWe are seeking a talented FPGA Design Engineer with industry experience in wireless digital communications, networking, and/or cryptography to join our team developing advanced wireless digital communication and electronic warfare systems. This role spans the full FPGA development lifecycle, including bids and proposals, requirements definition, specification development and maintenance, RTL design and coding, simulation, synthesis, place and route, verification through simulation and unit testing, system integration, and ongoing support. The engineer will participate in code and design reviews and ensure that high-speed digital FPGA designs meet written specifications within a DoW process-controlled work environment. The ideal candidate enjoys challenging technical work and thrives both as part of a talented engineering team and as an individual contributor.\nEssential Functions:\nAreas of desired technical experience or education include:\nNetworking protocols\nCryptographic Algorithms\nIndustry standard interfaces (e.g.. 10/100/1000 Ethernet, SPI, UART, SDRAM, DDR3, JESD, PCIe, etc.).\nFPGA verification through simulation and unit testing\nQualifications:\nBachelor’s Degree and a minimum of 12 years of prior relevant experience. Graduate Degree and a minimum of 10 years of prior related experience. In lieu of a degree, minimum of 16 years of prior related experience.12+ years FPGA design experience\nExperience leading teams of technical employees\nMust be able to secure or maintain a U.S. Department of Defense security clearance.\nPreferred Additional Skills:\nBachelor’s (Master’s preferred) degree in Computer Engineering or Electrical Engineering.\nExperience in VHDL (preferred) or Verilog, UVM, and SystemVerilog development languages.\nExperience in simulation, synthesis, and placement software tools such as ModelSim, Synplicity, AMD Vivado / ISE and/or Altera Quartus development tool sets.\nExperience witth HLS (High-Level Synthesis)\nExperience with timing closure in large FPGAs.\nExperience in laboratory debug techniques using digital scopes, logic analyzers, BERTS, and other complex measurement devices.\nFPGA Design using High-speed serial interfaces (3+ Gbps)\nFamiliarity with code revision management tools (preference for Git/Bitbucket and/or Clearcase).\nFamiliarity with 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