{"id":179845,"url":"https://alion.io/job/lam-research-electrical-technical-lead-engineer-2","title":"Electrical Technical Lead Engineer","company":{"id":58649,"name":"Lam Research","domain":"lamresearch.com","url":"https://alion.io/company/lam-research","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Eightfold","truth_index":{"grade":"C","score":58,"open_postings":805,"ghost_share":0.427,"stale_share":0.027,"repost_share":0.723,"time_to_fill_p50_days":70,"computed_at":"2026-10-01T05:45:00Z"}},"role":"Hardware","role_family":"Hardware","seniority":"lead","employment_type":null,"work_mode":"hybrid","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Bengaluru, India"],"countries":["IN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":31000,"max_usd":73000,"period":"year","method":"global_role_cell_scaled_by_country","sample_n":436},"experience_years_min":5,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"C++","optional":false},{"name":"Cadence Allegro","optional":false},{"name":"OrCAD","optional":false},{"name":"Cadence Sigrity","optional":true}],"status":"live","first_seen_at":"2026-08-07T10:48:08Z","employer_posted_date":"2026-08-27","last_verified_at":"2026-10-01T14:19:31Z","board_verified":true,"closed_at":null,"days_open":55,"trust":{"level":"ghost","repost_count":4,"flags":["repost"],"days_open":54},"description":"The group you’ll be a part of\nLam Research is a leading global manufacturer of capital equipment used in making leading-edge-semiconductors across the world. We primarily compete in four specific areas - deposition, etch, photoresist strip, and single wafer clean. Lam Research India team is organized into three major areas of responsibility: Hardware, Software, and Operations. We have an open position in the Hardware group. The Hardware group, designs subassemblies and subsystems for Lam’s product lines, providing innovation for the next-generation products, providing improvements in cost and reliability. In Hardware group, mechanical engineers, simulation analysts, electrical engineers, manufacturing engineers, and supplier quality engineers contribute to designing and improving Lam’s products.\nEligibility Criteria\nEducational qualification: Bachelor of Electrical Engineering, MTech is an added advantage.\nYears of Experience: 5-8 years of relevant experience in Circuit and schematic design, PCB design & testing\nPrimary Responsibility\nResponsible for executing Electrical Engineering technical disciplines with primary focus on designing, developing, modifying circuitry & PCB’s.\nExperience with Board Design, Electronics Circuits including microcontroller/FPGA based designs, sensor interfaces, analog signal conditioning circuits, power supplies, ethernet based communication interfaces, Wireless Interfaces, Wireless Chargers etc.\nExperience in working with cross-disciplinary teams (including mechanical, electro-mechanical, software, process, manufacturing engineers) for major projects with multi-national work environment.\nCreation of system interconnects diagram and electrical schematics diagram based on requirements received from cross-disciplinary teams\nOwn the Cable Designs, drafting of cables, creation of harness drawings\nCreating electrical schematics and PCB layouts based on requirements received from cross-disciplinary teams\nCreating and releasing engineering drawings & bill of materials using Engineering Change Management process\nInteracting with PG counterpart in US\nStudying and recommending corrective solutions for technical issues of varying complexities.\nConducting Design review to get buy-in from all cross functional teams\nManaging in a very dynamic and fast paced work environment with frequent updates, design packages with quick solutions etc.\nMandatory Skills\nCore PCB Design Expertise with OrCAD Allegro - designed complex boards 10-12 layers with SMD’s, BGA’s, through hole parts, placement, routing, setting up constraints, working with component library teams for PCB footprint, working with Electrical Engineer on PCB layout reviews.\nPerforming Schematic Entry in OrCAD Design Entry and circuit understanding with op-amps, comparators, passive devices, sensor circuitry, semiconductors IC’s - microcontrollers/FPGA, power supplies (DC-DC Converters)\nWorking alongside EE, ME for planning the board, DFT philosophy, working with PCB vendors for design for manufacturability (DFM), mechanical packaging constraints and PCB stack-up\nAbility to write test plans for PCB testing and ability to perform low level IO testing on sub-controller and devices, debugging board failures/issues\nWork experience in microcontroller (ARM Cortex based) or embedded device programming\nDemonstrate strong fundamental coding in C/C++ and Data Structures\n Able to work and establish best practices with PCB supplier who is responsible to build/test boards and with Supplier Quality who is responsible for test fixture development.\nDesirable Skills\nGood understanding of different standards and compliances like - IPC, SEMI Standard (Electrical) S2, S8, S22 etc.\nUnderstanding of manufacturing operations, how the remote factory supply chain work, general knowledge of BOM structuring is a value addition.\nKnowledge of Problem Solving, Decision Making Process\nPerforming signal integrity analysis with Sigrity is an added advantage.\nUnderstand the test fixture coverage. Know when and how to send suspected board for re-test when needed. Able to review failure analysis further determine board issue or sub system issue or system integration issue\nAbility to understand and debug H/W, S/W Controls issues, Data Gathering, Analysis, Preparing Test Reports\nPerforming RCCA, Investigations, identifying potential issues arising out of updates made to boards/change in manufacturing process & materials.\nElectrical troubleshooting - PCBs, sensors, power supplies, communication interfaces including Wireless Connections etc.\nAble to repeat the test required and performed during Pilot run. Using signal list, system interconnect diagram, interlock table, PCB files, assembly drawings etc.to isolate issues\n\nOur commitment\nWe believe it is important for every person to feel valued, included, and empowered to achieve their full potential. By bringing unique individuals and viewpoints together, we achieve extraordinary results.\nLam Research (\"Lam\" or the \"Company\") is an equal opportunity employer. Lam is committed to and reaffirms support of equal opportunity in employment and non-discrimination in employment policies, practices and procedures on the basis of race, religious creed, color, national origin, ancestry, physical disability, mental disability, medical condition, genetic information, marital status, sex (including pregnancy, childbirth and related medical conditions), gender, gender identity, gender expression, age, sexual orientation, or military and veteran status or any other category protected by applicable federal, state, or local laws. It is the Company's intention to comply with all applicable laws and regulations. Company policy prohibits unlawful discrimination against applicants or employees.\nLam offers a variety of work location models based on the needs of each role. Our hybrid roles combine the benefits of on-site collaboration with colleagues and the flexibility to work remotely and fall into two categories - On-site Flex and Virtual Flex. ‘On-site Flex’ you’ll work 3+ days per week on-site at a Lam or customer/supplier location, with the opportunity to work remotely for the balance of the week. ‘Virtual Flex’ you’ll work 1-2 days per week on-site at a Lam or customer/supplier location, and remotely the rest of the time.","description_format":"text","description_chars":6303,"description_truncated":false,"requirements":{"experience_years_min":5,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":null,"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[{"name":"India","iso":"IN","kind":"country"}],"hiring_excludes":[],"relocation_offered":false,"industries":["Manufacturing","Semiconductor Manufacturing"],"lifecycle":[{"event":"open","at":"2026-08-31T13:11:52Z"},{"event":"close","at":"2026-08-31T17:59:23Z"},{"event":"reopen","at":"2026-09-03T14:12:06Z"},{"event":"close","at":"2026-09-04T02:53:15Z"},{"event":"reopen","at":"2026-09-05T06:37:40Z"},{"event":"close","at":"2026-09-06T04:55:38Z"},{"event":"reopen","at":"2026-09-11T14:14:50Z"},{"event":"close","at":"2026-09-12T00:12:28Z"},{"event":"reopen","at":"2026-09-12T03:20:38Z"},{"event":"close","at":"2026-09-12T09:33:29Z"},{"event":"reopen","at":"2026-09-12T13:02:39Z"},{"event":"close","at":"2026-09-12T19:05:56Z"},{"event":"reopen","at":"2026-09-14T07:06:46Z"}],"liveness":{"score":19,"band":"cold","label":"Long shot","p_open":1,"p_active":0.247,"p_room":0.75,"age_days":54,"expected_fill_days":70,"reasons":["conf:2","repost:4","evergreen","velocity","ghost","win:late","comp:brand"],"computed_at":"2026-10-01T05:45:00Z"},"pay":null,"html_url":"https://alion.io/job/lam-research-electrical-technical-lead-engineer-2","json_url":"https://alion.io/job/lam-research-electrical-technical-lead-engineer-2.json","meta":{"generated_at":"2026-10-02T00:54:18Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","usage":{"tier":"crawler","counted_by":"address","units_charged":1,"used_today":969,"day_limit":5000,"remaining_today":4031,"minute_limit":60,"resets_at":"2026-10-03T00:00:00Z"}}}