{"id":3163802,"url":"https://alion.io/job/larsen-toubro-lead-engineer-emulation","title":"Lead Engineer - Emulation","company":{"id":2124,"name":"Larsen & Toubro","domain":"larsentoubro.com","url":"https://alion.io/company/larsentoubro","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Career site","truth_index":{"grade":"A","score":94,"open_postings":20,"ghost_share":0,"stale_share":0.05,"repost_share":0,"time_to_fill_p50_days":63,"computed_at":"2026-10-25T05:49:26Z"}},"role":"Hardware","role_family":"Hardware","seniority":"lead","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Bengaluru, India"],"countries":["IN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":27000,"max_usd":61000,"period":"year","method":"global_role_cell_scaled_by_country","sample_n":741},"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Cadence Protium","optional":false},{"name":"Perl","optional":false},{"name":"Python","optional":false},{"name":"Siemens Veloce","optional":false},{"name":"Synopsys HAPS","optional":false},{"name":"Synopsys ZeBu","optional":false}],"status":"live","first_seen_at":"2026-10-23T16:47:19Z","employer_posted_date":"2026-10-23","last_verified_at":"2026-10-25T08:27:34Z","board_verified":true,"closed_at":null,"days_open":1,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":1},"description":"Role\nProvide technical leadership for FPGA-based SoC prototyping and emulation, with primary ownership of complex multi-FPGA prototyping, partitioning, FPGA implementation, timing closure, board bring-up and system-level debug. Drive FPGA emulator-based validation using platforms such as HAPS-100, ZeBu and Veloce, while establishing methodologies, automation and optimization strategies to improve capacity, performance, debug efficiency and pre-silicon validation TAT. Serve as the technical authority and escalation point for complex FPGA prototyping and emulation challenges.\nKey Responsibilities\nLead end-to-end FPGA prototyping and emulation of complex SoC/ASIC designs, covering RTL readiness, synthesis, partitioning, P&R, bitfile generation, hardware bring-up, validation and system-level debug. \nOwn and drive multi-FPGA prototyping for large and complex SoC designs using platforms such as HAPS, Protium and other FPGA-based prototyping systems, with strong focus on capacity, performance and scalability. \nDrive emulator-based validation on platforms such as ZeBu and Veloce, including model bring-up, compilation, partitioning, debug, performance optimization and integration with DV/SV/FW environments. \nProvide technical leadership in selecting and optimizing the appropriate FPGA prototyping vs. emulator strategy based on design size, debug requirements, performance, software execution and validation objectives. \nLead multi-FPGA partitioning and interconnect optimization, addressing FPGA resource utilization, pin multiplexing, routing congestion, cross-FPGA communication and partition-level timing challenges. \nOwn FPGA timing closure for complex multi-clock SoCs, including clock architecture analysis, clock/reset adaptation, constraint development, timing analysis and resolution of critical timing paths. \nLead FPGA board bring-up and system integration, including clocks, resets, JTAG, memories and key interfaces such as SPI, I2C, UART, MDIO, PCIe and other SoC interfaces. \nDrive prototype/emulator model bring-up and debug, using FPGA probes, waveform/debug tools and hardware/software correlation to identify issues across RTL, FPGA implementation, hardware and firmware. \nAnalyze RTL-to-netlist implementation, identify synthesis and implementation challenges, and work with RTL/design teams on modifications required for successful FPGA prototyping and emulation. \nOptimize synthesis and P&R flows to improve FPGA QoR, timing, utilization and build/compile turnaround time. \nDefine and establish FPGA prototyping and emulation methodologies, flows and best practices to improve model bring-up, debug efficiency and overall pre-silicon validation TAT. \nLead evaluation of next-generation FPGA prototyping and emulation platforms, assessing capacity, performance, compile time, debug capability, scalability and suitability for future SoC programs. \nDrive tool and flow validation across FPGA synthesis, P&R and prototyping/emulation environments, working closely with EDA/tool development teams on new features, stability and performance improvements. \nDevelop automation and productivity solutions using TCL/Perl/Python to automate FPGA builds, partition analysis, regression, QoR extraction, timing analysis, log analysis and result correlation. \nEstablish metrics and continuously optimize FPGA build time, emulation compile time, runtime performance, resource utilization, timing, capacity and overall prototyping/emulation turnaround time. \nServe as the technical escalation point for complex FPGA prototyping and emulation issues, driving root-cause analysis and resolution across FPGA, RTL, tools, hardware and software domains. \nCollaborate closely with Architecture, Design, DV, SV, Firmware, Software, Board and EDA teams to ensure smooth transition from RTL to FPGA prototype/emulator and accelerate pre-silicon validation. \nProvide technical leadership and mentoring to engineers in FPGA architecture, multi-FPGA partitioning, synthesis/P&R, timing closure, board bring-up, emulator flows and debug methodologies. \nDrive technical reviews with senior stakeholders, providing status, technical risks, dependencies, mitigation plans and execution strategy for major FPGA prototyping and emulation programs.","description_format":"text","description_chars":4249,"description_truncated":false,"requirements":{"experience_years_min":null,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":null,"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Civil & Structural Engineering","Engineering Services","Construction"],"lifecycle":[{"event":"open","at":"2026-10-23T16:47:19Z"}],"visa":[],"liveness":{"score":90,"band":"hot","label":"Hiring now","p_open":1,"p_active":0.903,"p_room":1,"age_days":1,"expected_fill_days":63,"reasons":["conf:1","velocity","win:early","comp:brand"],"computed_at":"2026-10-25T05:49:26Z"},"pay":null,"html_url":"https://alion.io/job/larsen-toubro-lead-engineer-emulation","json_url":"https://alion.io/job/larsen-toubro-lead-engineer-emulation.json","meta":{"generated_at":"2026-10-25T10:54:59Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":15585,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-26T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":2124},"rest":"https://alion.io/mcp/rest/get_company?id=2124"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Flarsen-toubro-lead-engineer-emulation"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Flarsen-toubro-lead-engineer-emulation"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Flarsen-toubro-lead-engineer-emulation"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/larsen-toubro-lead-engineer-emulation\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Flarsen-toubro-lead-engineer-emulation"}]}