{"id":2517401,"url":"https://alion.io/job/lattice-semiconductor-principal-engineer-product-management","title":"Principal Engineer Product Management","company":{"id":1792396,"name":"Lattice Semiconductor","domain":"latticesemi.com","url":"https://alion.io/company/latticesemi","size_band":"501-1000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"B","score":80,"open_postings":5,"ghost_share":0,"stale_share":0.8,"repost_share":0,"time_to_fill_p50_days":34,"computed_at":"2026-10-23T05:54:15Z"}},"role":"Product","role_family":"Product","seniority":"lead","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Duluth, United States","San Jose, United States","Austin, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":129000,"max_usd":239000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":919},"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[],"status":"live","first_seen_at":"2026-10-13T00:00:00Z","employer_posted_date":"2026-10-13","last_verified_at":"2026-10-22T15:15:07Z","board_verified":true,"closed_at":null,"days_open":10,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":10},"description":"Lattice Overview\nThere is energy here…energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality.\nEnergy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a “team first” organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you’re looking for.\nJob Description:\nWe are looking for a Solution Architect to own the technical and behavioral definition of our BIOS/UEFI firmware stack as it aligns to Open Compute Project (OCP) specifications - including MMBI (Modular Motherboard BIOS Interface), OBMF (Open BMC Firmware), and mPnP (Multi-Host Plug and Play, DC-MHS). This role sits at the intersection of standards development and product engineering: you will represent the company in relevant OCP working groups, translate emerging and existing specifications into concrete behavioral and interface documents, and hand engineering a solution architecture they can build against with confidence.\nWhat You'll Do\n Represent the company in OCP and related industry bodies (OCP workgroups covering DC-MHS, OBMF, MMBI, mPnP, and adjacent firmware/hardware specifications), contributing to specification development and tracking spec evolution that affects product direction.\nTranslate OCP specifications into internal solution architecture - defining how MMBI, OBMF, and mPnP requirements map onto our BIOS/UEFI and BMC firmware stack.\n Author behavioral specification documents that define expected system behavior at defined interfaces (host-to-BMC, multi-host arbitration, firmware update flows, hot-plug/hot-swap sequencing) in enough detail for engineering to implement without ambiguity.\n Author user-facing and integration documentation (design guides, interface control documents, reference implementation notes) that OEM/ODM partners and internal teams can use to validate compliance.\nDefine solution architecture artifacts - block diagrams, sequence diagrams, state machines, and interface contracts - that bridge OCP spec requirements and buildable engineering designs.\nWork cross-functionally with product engineering, firmware development, and validation teams to ensure architecture decisions are implementable, testable, and maintainable.\nTrack competitive and ecosystem positioning relative to other firmware vendors and OCP contributors, feeding insights back into product and R&D strategy.\nSupport customer- and partner-facing technical discussions, including OEM/ODM enablement and pre-sales technical deep dives on OCP-aligned platforms.\nWhat You'll Bring\nStrong working knowledge of BIOS/UEFI firmware architecture and the boot/platform initialization stack.\nDirect experience with OCP specifications and workgroups - ideally hands-on exposure to MMBI, OBMF, mPnP, or DC-MHS.\nExperience authoring technical specifications: behavioral specs, interface control documents, or architecture design documents that engineering teams have directly implemented from.\nFamiliarity with BMC firmware and host-BMC communication models (Redfish, IPMI, or equivalent management interfaces).\nExperience participating in standards bodies or industry consortia - contributing proposals, reviewing draft specs, or representing an organization in working group discussions.\nAbility to operate across abstraction levels: comfortable in a spec committee meeting in the morning and a firmware architecture review in the afternoon.\nStrong technical writing skills - clear, unambiguous documentation is a core deliverable of this role, not an afterthought.\nBachelor's or Master's degree in Computer Engineering, Electrical Engineering, Computer Science, or related field\nNice to Have\nPrior contribution history in OCP (named contributor, workgroup co-chair, or spec author).\nExperience with rack-scale or disaggregated server architectures (DC-MHS, multi-host platforms).\nFamiliarity with firmware security concepts (HRoT, secure boot, attestation) as they intersect with OCP specs.\nFamiliarity with ARM architecture\nWhy This Role Matters\nBIOS/UEFI and platform management are moving from proprietary, vendor-specific implementations toward open, standardized interfaces driven by hyperscalers and OCP. This role ensures our product engineering organization builds ahead of that curve - with architecture that is both spec-compliant and commercially differentiated - while giving the company a direct voice in how those standards evolve.\nIn addition to base pay, this role may be eligible for variable/ incentive compensation and/ or equity. In addition, this role is eligible for a comprehensive, competitive benefits package which may include healthcare and retirement plans, paid time off, and more!\nAdditional Information:\nThis position requires a successful background and reference checks and satisfactory proof of your right to work in:\nUnited States of AmericaLattice recognizes that employees are its greatest asset and the driving force behind success in a highly competitive, global industry. Lattice continually strives to provide a comprehensive compensation and benefits program to attract, retain, motivate, reward and celebrate the highest caliber employees in the industry.\nLattice is an international, service-driven developer of innovative low cost, low power programmable design solutions. Our global workforce, some 1,000 strong, shares a total commitment to customer success and an unbending will to win. For more information about how our FPGA, CPLD and programmable power management devices help our customers unlock their innovation, visit www.latticesemi.com. You can also follow us via Twitter, Facebook, or RSS. At Lattice, we value the diversity of individuals, ideas, perspectives, insights and values, and what they bring to the workplace. Applications are welcome from all qualified candidates.\nAs an E-Verify employer, we use this system to confirm the employment eligibility of all new hires in accordance with federal law. All applicants will be required to complete a Form I-9, Employment Eligibility Verification, upon hire. We do not use E-Verify to pre-screen job candidates and will comply with all E-Verify regulations.","description_format":"text","description_chars":6731,"description_truncated":false,"requirements":{"experience_years_min":null,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":["Equity","Retirement plans"],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Processors, MCUs & AI Chips"],"lifecycle":[{"event":"open","at":"2026-10-14T10:07:13Z"}],"visa":[{"country":"US","licensed_sponsor":true,"evidence":"H-1B filings in 12 months: 6 · green card filings: 5","filings_12m":6,"filings_prev_12m":9,"green_card_filings_12m":5,"median_offered_wage_usd":174318,"route":null,"cap_exempt":false,"checked_at":"2026-10-15T11:24:14+00:00","sources":["US Department of Labor: LCA disclosure data (H-1B, H-1B1, E-3)","US Department of Labor: PERM disclosure data (green cards)"],"filings_for_role_12m":0}],"liveness":{"score":90,"band":"hot","label":"Hiring now","p_open":1,"p_active":0.903,"p_room":1,"age_days":10,"expected_fill_days":34,"reasons":["conf:14","velocity","win:early","comp:brand"],"computed_at":"2026-10-23T05:54:15Z"},"pay":null,"html_url":"https://alion.io/job/lattice-semiconductor-principal-engineer-product-management","json_url":"https://alion.io/job/lattice-semiconductor-principal-engineer-product-management.json","meta":{"generated_at":"2026-10-23T23:33:42Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":7017,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-24T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":1792396},"rest":"https://alion.io/mcp/rest/get_company?id=1792396"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Flattice-semiconductor-principal-engineer-product-management"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Flattice-semiconductor-principal-engineer-product-management"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Flattice-semiconductor-principal-engineer-product-management"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/lattice-semiconductor-principal-engineer-product-management\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Flattice-semiconductor-principal-engineer-product-management"}]}