{"id":1364806,"url":"https://alion.io/job/lattice-semiconductor-senior-soft-ip-design-engineer","title":"Senior Soft IP Design Engineer","company":{"id":1792396,"name":"Lattice Semiconductor","domain":"latticesemi.com","url":"https://alion.io/company/latticesemi","size_band":"501-1000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"B","score":80,"open_postings":5,"ghost_share":0,"stale_share":0.8,"repost_share":0,"time_to_fill_p50_days":34,"computed_at":"2026-10-23T05:54:15Z"}},"role":"Hardware","role_family":"Hardware","seniority":"senior","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["George Town, Malaysia"],"countries":["MY"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":17500,"max_usd":41000,"period":"year","method":"global_role_cell_scaled_by_country","sample_n":1777},"experience_years_min":7,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"C++","optional":true},{"name":"Perl","optional":true},{"name":"Python","optional":true},{"name":"SystemVerilog","optional":true},{"name":"Verilog","optional":true}],"status":"live","first_seen_at":"2026-08-28T00:00:00Z","employer_posted_date":"2026-08-28","last_verified_at":"2026-10-22T15:15:07Z","board_verified":true,"closed_at":null,"days_open":56,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":56},"description":"Lattice Overview\nThere is energy here…energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality.\nEnergy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a “team first” organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you’re looking for.\nJob Description:\nJob Description:\nWe are seeking a Senior IP Design Engineer, passionate individual with technical leadership capabilities to build Connectivity IP portfolios for Lattice FPGA. The individual should have the ability to work closely with architect to translate specifications into high-speed RTL design, for the best Performance, Power and logic utilization.\nRequirements\nKey Skills\nExperience in high speed SERDES and video protocols (e.g.: DisplayPort, HDMI, MIPI, SDI) or Peripherals (SPI, I2C or I3C) is a plus.\n\nHands-on experience in FPGA RTL design, CDC/lint, verification, debug and timing closure is preferred\n\nProgramming skills (e.g.: Verilog, SystemVerilog, C/C++, Perl, TCL or Python).\n\nExperience in hardware validation or hardware interoperability test.\n\nExperience in soft IP packaging, example design and testbench development will be an added advantage.\n\nEducation and General:\nBS/MS/PhD in Electronics or Computer Engineering minimum of 7 years of FPGA IP design experience.\n\nIndependent and self-motivated, capable of executing under dynamic environment and uncertainties\n\n#LI-DNP\nAdditional Information:\nThis position requires a successful background and reference checks and satisfactory proof of your right to work in:\nMalaysiaLattice recognizes that employees are its greatest asset and the driving force behind success in a highly competitive, global industry. Lattice continually strives to provide a comprehensive compensation and benefits program to attract, retain, motivate, reward and celebrate the highest caliber employees in the industry.\nLattice is an international, service-driven developer of innovative low cost, low power programmable design solutions. Our global workforce, some 1,000 strong, shares a total commitment to customer success and an unbending will to win. For more information about how our FPGA, CPLD and programmable power management devices help our customers unlock their innovation, visit www.latticesemi.com. You can also follow us via Twitter, Facebook, or RSS. At Lattice, we value the diversity of individuals, ideas, perspectives, insights and values, and what they bring to the workplace. Applications are welcome from all qualified candidates.","description_format":"text","description_chars":3149,"description_truncated":false,"requirements":{"experience_years_min":7,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Artificial Intelligence","Hardware","Smart City"],"lifecycle":[{"event":"open","at":"2026-09-28T01:41:50Z"}],"visa":[],"liveness":{"score":35,"band":"fade","label":"Fading","p_open":1,"p_active":0.785,"p_room":0.45,"age_days":56,"expected_fill_days":34,"reasons":["conf:14","velocity","win:tail","comp:brand"],"computed_at":"2026-10-23T05:54:15Z"},"pay":null,"html_url":"https://alion.io/job/lattice-semiconductor-senior-soft-ip-design-engineer","json_url":"https://alion.io/job/lattice-semiconductor-senior-soft-ip-design-engineer.json","meta":{"generated_at":"2026-10-23T19:54:09Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":1121,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-24T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":1792396},"rest":"https://alion.io/mcp/rest/get_company?id=1792396"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Flattice-semiconductor-senior-soft-ip-design-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Flattice-semiconductor-senior-soft-ip-design-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Flattice-semiconductor-senior-soft-ip-design-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/lattice-semiconductor-senior-soft-ip-design-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Flattice-semiconductor-senior-soft-ip-design-engineer"}]}