{"id":1364778,"url":"https://alion.io/job/lattice-semiconductor-silicon-validation-engineer-2","title":"Silicon Validation Engineer","company":{"id":1792396,"name":"Lattice Semiconductor","domain":"latticesemi.com","url":"https://alion.io/company/latticesemi","size_band":"501-1000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"B","score":75,"open_postings":4,"ghost_share":0,"stale_share":1,"repost_share":0,"time_to_fill_p50_days":null,"computed_at":"2026-09-29T05:45:00Z"}},"role":"Hardware","role_family":"Hardware","seniority":"junior","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Pune, India"],"countries":["IN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":12500,"max_usd":31000,"period":"year","method":"global_role_cell_scaled_by_country","sample_n":417},"experience_years_min":2,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"BERT","optional":false},{"name":"Perl","optional":false},{"name":"Python","optional":false},{"name":"Verilog","optional":false},{"name":"VHDL","optional":false}],"status":"live","first_seen_at":"2026-09-04T00:00:00Z","employer_posted_date":"2026-09-04","last_verified_at":"2026-09-29T16:46:43Z","board_verified":true,"closed_at":null,"days_open":26,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":26},"description":"Lattice Overview\nThere is energy here…energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality.\nEnergy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a “team first” organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you’re looking for.\nJob Description:\nDo you have a passion for invention and self-challenge? This position gives you an opportunity to learn and participate in one of the most\ncutting-edge projects that Lattice’s Silicon Engineering team has embarked upon to date. We are validating building blocks in FPGA on board level to ensure functionality and performance aspect of Design intent. FPGA consists of various IPs as a building block such as\nSERDES(PMA/PCS), Memory DDR(DDR4, LPDDR4, DDR5 etc), DPHY, PLL, DSP, Fabric, I/O etc. As a Silicon Design Validation engineer,\nyou will have an opportunity to learn and train yourself on how to validate one/or many of the building blocks within the FPGA. And also, you\nwill be able to acquire knowledge on process/methodology required for validating certain IPs from planning to completion. While you are\nworking on those, you will be exposed to cutting edge equipment and advanced boards as well as Various SW/tools/scripts.\nWhat you’re going to be exposed to and learn:\nThe ideal candidate is highly motivated in developing a career in Silicon Design Validation engineering. You will get significant exposure and\ntraining in the following areas:\nChance to learn FPGA and it’s build block such as SERDES(PMA/PCS), Memory DDR(DDR4, LPDDR4, DDR5 etc), DPHY,\nPLL, DSP, MIPI, Fabric, I/O etc but not limited.\nValidate and characterize various IPs from silicon arrival to release to production.\nDevelop validation and characterization plans for certain IP, bench hardware and software.\nDevelop test logic RTL to achieve intended validation/characterization test.\nDrive new silicon product bring-up, validation, debug to asses IP functionality/performance. Characterizing data sheet\nparameters. Analyzing the measured data with statistical view. Data sheet preparation etc.\nServe as the central resource with design, verification, manufacturing, test, quality and marketing/apps as the product(s) move\nSilicon arrival to product release.\nSupporting customer issues as required to resolve issues found after product release\nYou Have…\n2+ years of experience\nElectrical Engineering degree with a strong desire to pursue an engineering career in Silicon Design Validation\nKnowledge in High Speed Serdes Interface characterization and protocol compliance testing such as\nPCIe/Ethernet/SDI/CoaXpress/JESD204, MIPI D-PHY, MIPI CSI/DSI-2, USB and DisplayPort/HDMI etc.\nKnowledge in high speed board design and signal integrity evaluation/debug.\nKnowledge in Verilog/VHDL and design implementation using FPGA development tools.\nKnowledge in test automation development using programming languages such as Python, Perl.\nKnowledge of statistical analysis concepts and use of analysis tools such as JMP, R.\nExposure on bench equipment for device characterization such as BERT, VNA, Oscilloscopes, Protocol Exerciser/Analyzers.\nExposure on FPGA(emulation/prototyping etc)\nStrong written and verbal communication skills to work with cross-functional team\nSelf-motivated and proactive with critical thinking.\nGood problem solving and debugging skills.\nAdditional Information:\nThis position requires a successful background and reference checks and satisfactory proof of your right to work in:\nIndiaLattice recognizes that employees are its greatest asset and the driving force behind success in a highly competitive, global industry. Lattice continually strives to provide a comprehensive compensation and benefits program to attract, retain, motivate, reward and celebrate the highest caliber employees in the industry.\nLattice is an international, service-driven developer of innovative low cost, low power programmable design solutions. Our global workforce, some 1,000 strong, shares a total commitment to customer success and an unbending will to win. For more information about how our FPGA, CPLD and programmable power management devices help our customers unlock their innovation, visit www.latticesemi.com. You can also follow us via Twitter, Facebook, or RSS. At Lattice, we value the diversity of individuals, ideas, perspectives, insights and values, and what they bring to the workplace. Applications are welcome from all qualified candidates.","description_format":"text","description_chars":5086,"description_truncated":false,"requirements":{"experience_years_min":2,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":null,"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Artificial Intelligence","Hardware","Smart City"],"lifecycle":[{"event":"open","at":"2026-09-28T01:41:50Z"}],"liveness":{"score":36,"band":"fade","label":"Fading","p_open":1,"p_active":0.656,"p_room":0.55,"age_days":25,"expected_fill_days":22,"reasons":["conf:15","velocity","win:tail","comp:junior,brand"],"computed_at":"2026-09-29T05:45:00Z"},"pay":null,"html_url":"https://alion.io/job/lattice-semiconductor-silicon-validation-engineer-2","json_url":"https://alion.io/job/lattice-semiconductor-silicon-validation-engineer-2.json","meta":{"generated_at":"2026-09-30T04:14:50Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","usage":{"tier":"crawler","counted_by":"address","units_charged":1,"used_today":2887,"day_limit":5000,"remaining_today":2113,"minute_limit":60,"resets_at":"2026-10-01T00:00:00Z"}}}