{"id":2838409,"url":"https://alion.io/job/lattice-semiconductor-staff-design-verification-engineer","title":"Staff Design Verification Engineer","company":{"id":1792396,"name":"Lattice Semiconductor","domain":"latticesemi.com","url":"https://alion.io/company/latticesemi","size_band":"501-1000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"B","score":79,"open_postings":6,"ghost_share":0,"stale_share":0.833,"repost_share":0,"time_to_fill_p50_days":34,"computed_at":"2026-10-25T05:49:26Z"}},"role":"Hardware","role_family":"Hardware","seniority":"staff","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["George Town, Malaysia"],"countries":["MY"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":26000,"max_usd":53000,"period":"year","method":"global_role_cell_scaled_by_country","sample_n":601},"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Perl","optional":false},{"name":"Python","optional":false},{"name":"SystemVerilog","optional":false},{"name":"UVM","optional":false}],"status":"live","first_seen_at":"2026-10-19T07:56:42Z","employer_posted_date":"2026-10-19","last_verified_at":"2026-10-25T16:31:51Z","board_verified":true,"closed_at":null,"days_open":6,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":6},"description":"Lattice Overview\nThere is energy here…energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality.\nEnergy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a “team first” organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you’re looking for.\nJob Description:\nResponsibilities\nLead verification planning, execution, and sign-off for complex FPGA/ASIC IPs, subsystems, and SoC-level designs.\nDefine verification methodologies, test strategies, coverage goals, and closure criteria for project deliverables.\nArchitect and develop advanced SystemVerilog/UVM verification environments, reusable verification components, scoreboards, assertions, and coverage models.\nDrive verification closure through functional coverage, code coverage, regression analysis, and risk assessments.\nLead debug of complex RTL, integration, low-power, timing, and gate-level simulation issues.\nCollaborate with architects, RTL designers, validation engineers, firmware teams, and program managers to ensure successful product execution.\nProvide technical leadership for verification methodologies, automation, infrastructure, and best practices across projects.\nMentor and guide verification engineers, perform design and verification reviews, and drive team technical excellence.\nSupport silicon bring-up, failure analysis, and root-cause investigations as required.\nDrive continuous improvements in verification productivity, quality, and reusability.\nRequired Qualifications\nBachelor's or Master's degree in Electrical/Electronic Engineering, Computer Engineering, or related field.\n8+ years of ASIC/FPGA functional verification experience.\nStrong expertise in SystemVerilog, UVM, and assertion-based verification.\nProven experience leading verification of complex IPs, subsystems, or SoCs from planning through sign-off.\nStrong debugging skills in RTL, gate-level, and system-level verification environments.\nExperience with constrained-random verification, coverage-driven verification, and regression management.\nProficiency in Python, Perl, Shell, or other scripting languages.\nExcellent communication and cross-functional collaboration skills.\nPreferred Qualifications\nExperience with PCIe, USB, MIPI CSI/DSI, Ethernet, SerDes, USB, or similar high-speed protocols.\nExperience with low-power verification (UPF/CPF).\nExperience with GLS, timing validation, and post-silicon debug.\nExperience driving verification methodology and infrastructure improvements across multiple projects.\nProven ability to mentor engineers and lead technical initiatives.\nAdditional Information:\nThis position requires a successful background and reference checks and satisfactory proof of your right to work in:\nMalaysiaLattice recognizes that employees are its greatest asset and the driving force behind success in a highly competitive, global industry. Lattice continually strives to provide a comprehensive compensation and benefits program to attract, retain, motivate, reward and celebrate the highest caliber employees in the industry.\nLattice is an international, service-driven developer of innovative low cost, low power programmable design solutions. Our global workforce, some 1,000 strong, shares a total commitment to customer success and an unbending will to win. For more information about how our FPGA, CPLD and programmable power management devices help our customers unlock their innovation, visit www.latticesemi.com. You can also follow us via Twitter, Facebook, or RSS. At Lattice, we value the diversity of individuals, ideas, perspectives, insights and values, and what they bring to the workplace. Applications are welcome from all qualified candidates.","description_format":"text","description_chars":4322,"description_truncated":false,"requirements":{"experience_years_min":null,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Processors, MCUs & AI Chips"],"lifecycle":[{"event":"open","at":"2026-10-19T07:56:42Z"}],"visa":[],"liveness":{"score":81,"band":"hot","label":"Hiring now","p_open":0.9,"p_active":0.903,"p_room":1,"age_days":5,"expected_fill_days":34,"reasons":["conf:62","velocity","win:early","comp:brand"],"computed_at":"2026-10-25T05:49:26Z"},"pay":null,"html_url":"https://alion.io/job/lattice-semiconductor-staff-design-verification-engineer","json_url":"https://alion.io/job/lattice-semiconductor-staff-design-verification-engineer.json","meta":{"generated_at":"2026-10-25T19:33:09Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":27779,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-26T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":1792396},"rest":"https://alion.io/mcp/rest/get_company?id=1792396"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Flattice-semiconductor-staff-design-verification-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Flattice-semiconductor-staff-design-verification-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Flattice-semiconductor-staff-design-verification-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/lattice-semiconductor-staff-design-verification-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Flattice-semiconductor-staff-design-verification-engineer"}]}