{"id":3994513,"url":"https://alion.io/job/leadsoc-technologies-senior-physical-design-engineer","title":"Senior Physical Design Engineer","company":{"id":3809842,"name":"LeadSoc Technologies","domain":"leadsoc.com","url":"https://alion.io/company/leadsoc-technologies-india","size_band":null,"is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":null,"truth_index":null},"role":"Hardware","role_family":"Hardware","seniority":"senior","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Bengaluru, India"],"countries":["IN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":null,"experience_years_min":5,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Synopsys Fusion Compiler","optional":false},{"name":"Synopsys PrimeTime","optional":false}],"status":"live","first_seen_at":"2026-11-10T00:36:15Z","employer_posted_date":null,"last_verified_at":"2026-11-10T00:36:15Z","board_verified":false,"closed_at":null,"days_open":0,"trust":{"level":"not_scored","repost_count":null,"flags":[],"days_open":0},"description":"The Physical Design Engineer will be responsible for the full-chip and/or block-level physical implementation of complex digital, mixed-signal, or RF integrated circuits from RTL to GDSII (the final manufacturing data). This role requires expertise in design methodologies to achieve optimal performance, power, and area (PPA) targets while ensuring manufacturability.\n\nKey Responsibilities:\nPhysical Implementation Flow: Own and execute all phases of the physical design flow, including:\nSynthesis (RTL to Netlist).\nFloorplanning and Partitioning (defining block boundaries, pin placement, and power grid planning).\nPower Rail/Grid Design and analysis (EM/IR Drop).\nPlace and Route (placement of standard cells and macro blocks, followed by signal routing).\nClock Tree Synthesis (CTS): Design and optimize the clock network for minimal skew and latency.\nTiming Closure: Perform Static Timing Analysis (STA), identify critical paths, and implement design optimization techniques (e.g., buffering, sizing, ECOs) to meet all frequency and timing constraints (setup/hold).\n\nRequired Qualifications and Skills:\n\nEducation:\nBachelor's or Master's degree in Electrical Engineering (EE), Electronics Engineering, VLSI, or a related field.\n\nTechnical Skills & Experience:\nExperience: 5+ years of experience in physical design, with a proven track record of tape-outs in advanced process nodes (e.g., 16nm, 7nm, 5nm, or lower).\nEDA Tools: Expert proficiency with industry-standard Electronic Design Automation (EDA) tools from vendors like Synopsys (e.g., Fusion Compiler, ICC2, Primetime), Cadence (e.g., Innovus), or Mentor Graphics.\n\nSoft Skills:\nExcellent analytical, debugging, and problem-solving skills.\nStrong verbal and written communication skills.\nAbility to work effectively in a team environment and collaborate across different engineering disciplines.\n\nEmployment Type: Permanent\nSkills\nCTS, Floor Planning, GDSII, P&R, Physical Design, Place, RTL, Route, STA","description_format":"text","description_chars":1965,"description_truncated":false,"requirements":{"experience_years_min":5,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":null,"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Semiconductor IP & Chip Design Services"],"lifecycle":[{"event":"open","at":"2026-11-10T00:36:15Z"}],"visa":[],"liveness":{"score":86,"band":"hot","label":"Hiring now","p_open":1,"p_active":0.86,"p_room":1,"age_days":0,"expected_fill_days":29,"reasons":["seen:0","win:early"],"computed_at":"2026-11-10T02:01:07Z"},"pay":null,"html_url":"https://alion.io/job/leadsoc-technologies-senior-physical-design-engineer","json_url":"https://alion.io/job/leadsoc-technologies-senior-physical-design-engineer.json","meta":{"generated_at":"2026-11-10T02:01:07Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":4720,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-11-11T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.1,"usd":0.01,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":3809842},"rest":"https://alion.io/mcp/rest/get_company?id=3809842"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fleadsoc-technologies-senior-physical-design-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":2,"usd":0.2},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fleadsoc-technologies-senior-physical-design-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.1,"usd":0.01},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fleadsoc-technologies-senior-physical-design-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/leadsoc-technologies-senior-physical-design-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fleadsoc-technologies-senior-physical-design-engineer"}],"agent":{"mcp":"https://alion.io/mcp/jobs","mcp_open":"https://alion.io/mcp/open","next":[{"tool":"get_job","arguments":{"id":3994513}},{"tool":"search_jobs","arguments":{"company":"leadsoc.com","detail":"compact"}},{"tool":"match_people","arguments":{"job_id":3994513},"note":"people open to offers who fit this vacancy"}],"note":"The same data through MCP tools: https://alion.io/mcp/open needs no sign-in (compact searches, postings, people); https://alion.io/mcp with an Alion account has everything. Docs: https://alion.io/developers"}}