{"id":2661339,"url":"https://alion.io/job/lmi-technologies-senior-hardware-engineer-lmi-technologies","title":"Senior Hardware Engineer - LMI Technologies","company":{"id":176494,"name":"LMI Technologies","domain":"lmi3d.com","url":"https://alion.io/company/lmi-technologies","size_band":"51-200","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"JazzHR","truth_index":null},"role":"Hardware","role_family":"Hardware","seniority":"senior","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Burnaby, Canada"],"countries":["CA"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":71000,"max_usd":125000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":57},"experience_years_min":5,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"OSVVM","optional":false},{"name":"SystemVerilog","optional":false},{"name":"UVM","optional":false},{"name":"Verilog","optional":false},{"name":"VHDL","optional":false},{"name":"C++","optional":true},{"name":"Claude","optional":true},{"name":"Xilinx Vivado","optional":true}],"status":"live","first_seen_at":"2026-10-16T00:52:03Z","employer_posted_date":"2026-10-16","last_verified_at":"2026-10-19T22:50:54Z","board_verified":true,"closed_at":null,"days_open":3,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":3},"description":"LMI is seeking a talented Senior Hardware (FPGA) engineer to join a multi-disciplinary engineering team. The successful candidate will have a proven record in developing complex FPGA code for an embedded environment. The candidate will be responsible for FPGA designs for a distributed system which includes machine vision, cameras, laser drivers, high speed communication channels and image processing. The candidate will be involved in the complete FPGA development cycle, from design to simulation, release and support.\nLead the design and implementation of high-performance RTL using VHDL, Verilog and SystemVerilog\nDefine FPGA architecture and micro-architecture specifications based on system-level requirements\nCollaborate with other teams in the technology department to define HW/SW interfaces and memory maps.\nSelect appropriate FPGA vendors (Xilinx/AMD, Intel, Microchip) and specific chip families based on project needs.\nDesign and maintain self-checking testbenches using SystemVerilog/UVM or VHDL/OSVVM to ensure high functional coverage.\nImplement constrained random stimulus generation to uncover complex corner cases that manual directed tests might miss.\nDeeply analyze data sheets from FPGA vendors and external component providers (ADCs, DACs, PHYs) to verify timing, voltage, and power compatibility.\nMentor other engineers through code reviews and technical guidance.\nConduct feasibility studies for new features or hardware platforms.\nInterface with vendors to resolve tool-specific bugs or procure IP cores.\nEducation and Qualifications\nBachelor Degree in Electrical Engineering\nP.Eng designation or working towards it would be desirable\nMinimum 5+ years relevant experience designing and testing digital logic (FPGA or ASIC)\nHands-on experience designing with VHDL and/or Verilog complex systems with multiple clock-domains, high speed interfaces (LVDS, PCIe, memories, MIPI, MGT) and data processing cores is required.\nHands-on experience with self-verifying simulation environments and techniques\nStrong ability in tracking and identifying FPGA problems (logic, timing, implementation, synchronization)\nExperience with HW debugging tools (logic analyzers, Chipscope)\nExperience in translating high level requirements into an architecture, considering aspects like resource/power use, performance, ease of maintenance, compatibility and design partitioning into modules or hardware and SW functions.\nAble to produce solid designs in a fast-paced environment\nPassionate for leading edge technology, out of the box thinking and its challenges\nCapable of working in small teams and be accountable for your performance and documentation\nNice to have:Xilinx’ Zynq7K and MP, AXI interfaces, Xilinx IP, Vivado, Xilinx ISE, and Chipscope for FPGA development\nFPGA/SoCs from other vendors (Intel, Lattice)\nImage processing and machine vision concepts\nAI concepts and coding tools (Claude, Gemini)\nDesigns incorporating soft core CPUs: Microblaze, Picoblaze\nHigher level design languages (System Verilog, System C) and tools or flows (i.e. Vivado HDL)\nVerification (UVM)\nOther languages: TCL, C/C++\nExperience with Oscilloscopes and Logic Analyzers for development and debugging","description_format":"text","description_chars":3195,"description_truncated":false,"requirements":{"experience_years_min":5,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":null,"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Sensors & Transducers","Machine Vision & 3D Cameras"],"lifecycle":[{"event":"open","at":"2026-10-16T00:52:03Z"}],"visa":[],"liveness":{"score":90,"band":"hot","label":"Hiring now","p_open":1,"p_active":0.903,"p_room":1,"age_days":3,"expected_fill_days":36,"reasons":["conf:1","velocity","win:early"],"computed_at":"2026-10-19T05:45:15Z"},"pay":null,"html_url":"https://alion.io/job/lmi-technologies-senior-hardware-engineer-lmi-technologies","json_url":"https://alion.io/job/lmi-technologies-senior-hardware-engineer-lmi-technologies.json","meta":{"generated_at":"2026-10-20T00:32:31Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per 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