{"id":1881099,"url":"https://alion.io/job/lockheed-martin-asic-fpga-design-engineer-sr-stf-e5-2","title":"ASIC & FPGA Design Engineer Sr Stf - E5","company":{"id":37086,"name":"Lockheed Martin","domain":"lockheedmartin.com","url":"https://alion.io/company/lockheedmartin","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Eightfold","truth_index":{"grade":"A","score":99,"open_postings":121,"ghost_share":0,"stale_share":0,"repost_share":0.05,"time_to_fill_p50_days":28,"computed_at":"2026-10-12T06:55:09Z"}},"role":"Hardware","role_family":"Hardware","seniority":"senior","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Littleton, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":{"min":166900,"max":309900,"currency":"USD","period":"year","gross":null,"usd_annual":309900},"salary_estimate":null,"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"SystemVerilog","optional":false},{"name":"Verilog","optional":false},{"name":"VHDL","optional":false},{"name":"C++","optional":true},{"name":"MATLAB","optional":true}],"status":"live","first_seen_at":"2026-09-23T16:11:53Z","employer_posted_date":"2026-09-28","last_verified_at":"2026-10-12T20:05:22Z","board_verified":true,"closed_at":null,"days_open":19,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":19},"description":"Standard Job Description\nJoin Our Team as a ASIC/FPGA Design Engineer Sr Staff where you will work on the development of a sophisticated state-of-the-art avionics product in a world class Integrated Product Development environment.\nLocation: This position does not support teleworking; the selected candidate will be located near our Lockheed Martin Space facility in:\nLittleton, CO\nYou will be working a flexible 9x80 schedule in the office full-time.\nThe information below reflects the standard job description for this position:\nDevelops, designs, verifies, and documents Application-Specific Integrated Circuits (ASIC) and Field Programmable Gate Arrays (FPGA) development. Determines architecture design, logic design, and system simulation. Assignments include the analysis of all aspects from high-level design to synthesis, place and route, and timing and power utilization. Typically uses specialized equipment to establish operation data, conduct experimental tests, and evaluate results.\nBasic Qualifications\nExperience in the design of FPGA and/or ASIC devices.\nHDL programming experience with VHDL, Verilog, and/or SystemVerilog.\nWilling and able to obtain and maintain a DoD Secret clearance, thus US Citizenship is required for this position.\nEquivalent experience/combined education.\nAcitve Secret Clearance.\nDesired Skills\nBachelor of Science or higher from an accredited college in Electrical Engineering or related discipline.\nUnderstand the basics of Digital Signal Processing (DSP) implementation, and have the ability to implement a defined module or part of an algorithm.\nExperience with DSP methodologies (Nyquist sampling, FFT/IFFT, digital filtering, FIR filters)\nFamiliar with MATLAB, C/C++, and VHDL/Verilog DSP implementation.\nUnderstanding Fixed vs. Floating-Point processing.\nExperience or coursework in the design of FPGA and/or ASIC devices.\nExperience in ASIC / FPGA life cycle (architecture, design, simulation, verification, validation, integration & test).\nKnowledge of Forward Error Correction (FEC), interleaving/de-interleaving, hopping/dehopping, modulation/de-modulation, channelizers and reconstructors.\nExperience with ADC and DAC implementation.\nExperience or knowledge of MS Project, JIRA.\nExperience leading projects of multiple engineers, managing schedules. prioritizing work and actively communicating with internal or external stakeholders.\nKnowledge of space-grade/qualified FPGAs and ASICs.\nExperience with Earned Value Management System (EVMS).\nExperience in 5G and/or LTE is a plus.\nExperience mentoring junior engineers.\nPay Information\nFull-Time Salary Range: $166900.00 - $309900.00\nAt Lockheed Martin, we know mission success starts with taking care of our people. Our Total Rewards program is designed to attract top talent, support your well-being, and help you grow-both professionally and personally.\nThe salary range for this position is as listed on the requisition. Please note that the salary information listed is a general guideline only. Lockheed Martin considers factors such as (but not limited to) scope and responsibilities of the position, candidate's work experience, education/ training, key skills as well as market(work location) and business considerations when extending an offer.\nBenefits offered: Medical, Dental, Vision, Flexible work arrangements and schedules (e.g., 4x10), 401(k) match, Paid time off, Holidays, Parental Leave, EAP, Flexible Spending Accounts, Education Assistance, Life Insurance, Short-Term Disability, and Long-Term Disability.\nAnnual short-term and/or long-term incentive compensation programs may be offered depending on the position. Payments under these annual programs are not guaranteed and can vary from year to year and are tied to a range of performance metrics.\nFor (Washington state applicants only) Non-represented full-time employees: accrue at least 10 hours per month of Paid Time Off (PTO) to be used for incidental absences and other reasons; receive at least 90 hours for holidays. Represented full time employees accrue 6.67 hours of Vacation per month; accrue up to 52 hours of sick leave annually; receive at least 96 hours for holidays. PTO, Vacation, sick leave, and holiday hours are prorated based on start date during the calendar year.","description_format":"text","description_chars":4269,"description_truncated":false,"requirements":{"experience_years_min":null,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":true},"security_clearance":true,"languages":[]},"benefits":["Education assistance","Flexible schedule","Life insurance","Parental leave"],"hiring_locations":[{"name":"United States","iso":"US","kind":"country"}],"hiring_excludes":[],"relocation_offered":false,"industries":["Artificial Intelligence","Manufacturing","Military"],"lifecycle":[{"event":"open","at":"2026-10-04T23:51:36Z"}],"visa":[{"country":"US","licensed_sponsor":true,"evidence":"H-1B filings in 12 months: 1","filings_12m":1,"filings_prev_12m":1,"green_card_filings_12m":0,"median_offered_wage_usd":182500,"route":null,"cap_exempt":false,"checked_at":"2026-10-03T21:08:04+00:00","sources":["US Department of Labor: LCA disclosure data (H-1B, H-1B1, E-3)"],"filings_for_role_12m":0}],"liveness":{"score":72,"band":"hot","label":"Hiring now","p_open":1,"p_active":0.795,"p_room":0.9,"age_days":18,"expected_fill_days":28,"reasons":["conf:3","velocity","win:mid","comp:brand"],"computed_at":"2026-10-12T06:55:09Z"},"pay":{"stated_usd_annual":309900,"is_top_pay":true},"html_url":"https://alion.io/job/lockheed-martin-asic-fpga-design-engineer-sr-stf-e5-2","json_url":"https://alion.io/job/lockheed-martin-asic-fpga-design-engineer-sr-stf-e5-2.json","meta":{"generated_at":"2026-10-12T23:25:24Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":38499,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-13T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":37086},"rest":"https://alion.io/mcp/rest/get_company?id=37086"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Flockheed-martin-asic-fpga-design-engineer-sr-stf-e5-2"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Flockheed-martin-asic-fpga-design-engineer-sr-stf-e5-2"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Flockheed-martin-asic-fpga-design-engineer-sr-stf-e5-2"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/lockheed-martin-asic-fpga-design-engineer-sr-stf-e5-2\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Flockheed-martin-asic-fpga-design-engineer-sr-stf-e5-2"}]}