{"id":992656,"url":"https://alion.io/job/lockheed-martin-asic-fpga-design-engineer-stf-e4-4","title":"ASIC & FPGA Design Engineer Stf - E4","company":{"id":37086,"name":"Lockheed Martin","domain":"lockheedmartin.com","url":"https://alion.io/company/lockheedmartin","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Eightfold","truth_index":{"grade":"A","score":100,"open_postings":106,"ghost_share":0,"stale_share":0,"repost_share":0.019,"time_to_fill_p50_days":21,"computed_at":"2026-09-29T05:45:00Z"}},"role":"Hardware","role_family":"Hardware","seniority":null,"employment_type":null,"work_mode":"remote","remote_scope":"stated_countries","remote_scope_basis":"board_field","remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Sunnyvale, United States"],"countries":["US"],"hiring_countries":["US"],"hiring_countries_total":1,"salary":{"min":150800,"max":280000,"currency":"USD","period":"year","gross":null,"usd_annual":280000},"salary_estimate":null,"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"SystemVerilog","optional":false},{"name":"Verilog","optional":false},{"name":"VHDL","optional":false},{"name":"Xilinx Vivado","optional":true}],"status":"live","first_seen_at":"2026-09-14T23:31:50Z","employer_posted_date":"2026-09-16","last_verified_at":"2026-09-20T14:10:15Z","board_verified":false,"closed_at":null,"days_open":15,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":15},"description":"Standard Job Description\nJoin Our Team as an ASIC & FPGA Design Engineer where you will support over 50 different programs and research and development (R&D) efforts, affecting technology across military space, civil space, commercial space, missiles, missile defense platforms, satellite surveillance platforms, deep space exploration, and manned flight missions.\nThe Silicon Solutions team of Lockheed Martin Space is building the best ASIC/FPGA team in the world, and are seeking a highly talented and motivated ASIC & FPGA Design Engineer who has a passion for microchip design and space.\nThe information below reflects the standard job description for this position:\nDevelops, designs, verifies, and documents Application-Specific Integrated Circuits (ASIC) and Field Programmable Gate Arrays (FPGA) development. Determines architecture design, logic design, and system simulation. Assignments include the analysis of all aspects from high-level design to synthesis, place and route, and timing and power utilization. Typically uses specialized equipment to establish operation data, conduct experimental tests, and evaluate results.\nBasic Qualifications\nBachelor of Science or higher from an accredited college in Electrical Engineering or related discipline, or equivalent experience/combined education.\nPrior FPGA development experience.\nHDL programming experience with VHDL, Verilog, and/or SystemVerilog. \nActive DoD Secret clearance, thus US Citizenship is required. \nDesired Skills\nMasters Degree.\nExperience in ASIC / FPGA life cycle (architecture, design, simulation, verification, validation, integration & test). \nFPGA/ASIC verification experience is a plus. \nExperience with electronics design.\nExperience in lab integration, and troubleshooting activities.\nKnowledge of space-grade/qualified FPGAs and ASICs and toolsets including AMD/Xilinx Vivado or Microchip Libero. \nExperience or knowledge of MS Project, JIRA. \nExperience with MS Project, JIRA or equivalent a plus. \nExperience with Earned Value Management System (EVMS). \nExperience mentoring junior engineers. \nProficient in AI prompting as it applies to this position and practice.\nPay Information\nGeoZone Definition: GeoZones are geographic groupings created by Lockheed Martin to align compensation ranges with regional labor markets and cost-of-labor differences across the United States. Locations are assigned a Geo Zone based on the primary work location of the role.\nFull-time salary range (GEOZONE 1): $150800.00 - $280000.00 Includes metropolitan areas such as Sunnyvale CA; Pal Alto, CA; New York City metropolitan area; Newark, New Jersey; etc.\n\nFull-time salary range (GEOZONE 2): $135700.00 - $251900.00 Includes metropolitan areas such as Denver, CO; King of Prussia, PA; Stratford, CT; Moorestown, NJ; etc.\n\nFull-time salary range (GEOZONE 3): $120600.00 - $224000.00Includes metropolitan areas such as Dallas-Fort Worth, TX; Orlando, FL; Grand Prairie, TX; Marietta, GA; etc.\n\nFull-time salary range (GEOZONE 4): $108600.00 - $201600.00Includes metropolitan areas such as Camden, AR; Lexington, KY; Lufkin, TX; etc. \n\nAt Lockheed Martin, we know mission success starts with taking care of our people. Our Total Rewards program is designed to attract top talent, support your well-being, and help you grow-both professionally and personally.\nThe salary range for this position is as listed on the requisition. Please note that the salary information listed is a general guideline only.\nLockheed Martin considers factors such as (but not limited to) scope and responsibilities of the position, candidate's work experience, education/ training, key skills as well as market(work location) and business considerations when extending an offer.\nBenefits offered: Medical, Dental, Vision, Flexible work arrangements and schedules (e.g., 4x10), 401(k) match, Paid time off, Holidays, Parental Leave, EAP, Flexible Spending Accounts, Education Assistance, Life Insurance, Short-Term Disability, and Long-Term Disability.\nAnnual short-term and/or long-term incentive compensation programs may be offered depending on the position. Payments under these annual programs are not guaranteed and can vary from year to year and are tied to a range of performance metrics.\nFor (Washington state applicants only) Non-represented full-time employees: accrue at least 10 hours per month of Paid Time Off (PTO) to be used for incidental absences and other reasons; receive at least 90 hours for holidays. Represented full time employees accrue 6.67 hours of Vacation per month; accrue up to 52 hours of sick leave annually; receive at least 96 hours for holidays. PTO, Vacation, sick leave, and holiday hours are prorated based on start date during the calendar year.","description_format":"text","description_chars":4739,"description_truncated":false,"requirements":{"experience_years_min":null,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":true},"security_clearance":true,"languages":[]},"benefits":["Education assistance","Flexible schedule","Life insurance","Parental leave"],"hiring_locations":[{"name":"United States","iso":"US","kind":"country"}],"hiring_excludes":[],"relocation_offered":false,"industries":["Manufacturing","Military","Defense Manufacturing"],"lifecycle":[{"event":"open","at":"2026-09-17T04:51:00Z"}],"liveness":{"score":45,"band":"ok","label":"Likely open","p_open":0.7,"p_active":0.716,"p_room":0.9,"age_days":14,"expected_fill_days":21,"reasons":["conf:207","velocity","win:mid","comp:brand"],"computed_at":"2026-09-29T05:45:00Z"},"pay":{"stated_usd_annual":280000,"is_top_pay":true},"html_url":"https://alion.io/job/lockheed-martin-asic-fpga-design-engineer-stf-e4-4","json_url":"https://alion.io/job/lockheed-martin-asic-fpga-design-engineer-stf-e4-4.json","meta":{"generated_at":"2026-09-30T04:29:03Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","usage":{"tier":"crawler","counted_by":"address","units_charged":1,"used_today":3170,"day_limit":5000,"remaining_today":1830,"minute_limit":60,"resets_at":"2026-10-01T00:00:00Z"}}}