368,611open jobs
9,439companies
50,719added this week
Browse all
Salary
$101k – $210k per year (Estimated)
Location
Remote (United States)
Seniority
Senior · 8+ years exp
Overview
Company
Impact
Profile match
Lockheed Martin (NYSE: LMT) is a global aerospace, defense, security, and advanced technology corporation headquartered in Bethesda, Maryland. Formed in 1995 through the merger of Lockheed Corporation and Martin Marietta, the company is one of the world's largest defense contractors, operating primarily across four core business segments: Aeronautics; Missiles and Fire Control; Rotary and Mission Systems; and Space.

Standard Job Description

You will be the ASIC & FPGA Design Engineer for the ASIC/FPGA department at Lockheed Martin Missiles and Fire Control. Our team delivers full custom analog and mixed signal ICs that power advanced defense systems, ranging from 130 nm down to 12 nm and including high voltage BCD processes.

What You Will Be Doing

As the ASIC & FPGA Design Engineer you will own the entire layout flow-from floorplan through tape out-working hand in hand with circuit designers to turn schematic intent into high performance, parasitic aware physical designs. You will operate in a dual tool environment (Synopsys Custom Compiler and Cadence Virtuoso) and drive physical verification closure across multiple foundries, directly supporting mission critical programs. Your responsibilities will include:

  • Create floorplans, place and route analog blocks, optimizing area, matching, signal integrity and power delivery.
  • Drive DRC, LVS and ERC verification to achieve full closure for each target process.
  • Perform or support EMIR analysis to detect and remediate IR drop and electromigration concerns.
  • Develop and maintain layout methodology, automation scripts and best practice guidelines for the department.
  • Collaborate with circuit designers, verification engineers and system architects to ensure the layout reflects functional intent and performance targets.
  • Manage tape out sign off packages, including documentation, design rule decks and release notes.
  • Mentor junior layout engineers and promote a knowledge sharing culture.

Why Join Us

Do you want to be part of a company culture that empowers employees to think big, lead with a growth mindset, and make the impossible a reality? We provide the resources and give you the flexibility to enable inspiration and focus. If you have the passion and courage to dream big, work hard, and have fun doing what you love then we want to build a better tomorrow with you.

We offer flexible work schedules to comprehensive benefits investing in your future and security, Learn more about Lockheed Martin’s comprehensive benefits package here.

Further Information About This Opportunity:

This position is remote.

MUST BE A U.S. CITIZEN - This position is located at a facility that requires special access. The selected candidate must be able to obtain a secret clearance.

Basic Qualifications

  • Associate degree or higher in Electrical Engineering, Electronics Technology, Microelectronics, or a related technical discipline
  • 8 or more years of experience in full-custom analog or mixed-signal IC layout design
  • Layout experience across process nodes ranging from 130nm to 12nm, including BCD technologies
  • Proficiency with Synopsys Custom Compiler (or Custom Designer)
  • Proficiency with Cadence Virtuoso layout environment
  • Experience with physical verification closure (DRC, LVS, ERC, ANT) across multiple foundry processes
  • Ability to obtain a U.S. security clearance

Desired Skills

  • Bachelor degree or higher in Electrical Engineering, Microelectronics, or a related field
  • EMIR analysis experience, including IR drop and electromigration mitigation
  • Scripting or layout automation skills (SKILL, Tcl, Python, or Perl)
  • Layout experience with precision analog blocks such as PLLs, ADC/DACs, LDOs, bandgap references, or amplifiers

Pay Information

GeoZone Definition: GeoZones are geographic groupings created by Lockheed Martin to align compensation ranges with regional labor markets and cost-of-labor differences across the United States. Locations are assigned a Geo Zone based on the primary work location of the role.

  • Full-time salary range (GEOZONE 1): $122600.00 - $227600.00
    • Includes metropolitan areas such as Sunnyvale CA; Pal Alto, CA; New York City metropolitan area; Newark, New Jersey; etc.
  • Full-time salary range (GEOZONE 2): :$110300.00 - $204900.00
    • Includes metropolitan areas such as Denver, CO; King of Prussia, PA; Stratford, CT; Moorestown, NJ; etc.
  • Full-time salary range (GEOZONE 3): :$98100.00 - $182100.00
    • Includes metropolitan areas such as Dallas-Fort Worth, TX; Orlando, FL; Grand Prairie, TX; Marietta, GA; etc.
  • Full-time salary range (GEOZONE 4): :$88300.00 - $163900.00
    • Includes metropolitan areas such as Camden, AR; Lexington, KY; Ocala, FL; Lufkin, TX; etc.

At Lockheed Martin, we know mission success starts with taking care of our people. Our Total Rewards program is designed to attract top talent, support your well-being, and help you grow-both professionally and personally.

The salary range for this position is as listed on the requisition. Please note that the salary information listed is a general guideline only.

Lockheed Martin considers factors such as (but not limited to) scope and responsibilities of the position, candidate's work experience, education/ training, key skills as well as market(work location) and business considerations when extending an offer.

Benefits offered: Medical, Dental, Vision, Flexible work arrangements and schedules (e.g., 4x10), 401(k) match, Paid time off, Holidays, Parental Leave, EAP, Flexible Spending Accounts, Education Assistance, Life Insurance, Short-Term Disability, and Long-Term Disability.

  • Annual short-term and/or long-term incentive compensation programs may be offered depending on the position. Payments under these annual programs are not guaranteed and can vary from year to year and are tied to a range of performance metrics.
  • For (Washington state applicants only) Non-represented full-time employees: accrue at least 10 hours per month of Paid Time Off (PTO) to be used for incidental absences and other reasons; receive at least 90 hours for holidays. Represented full time employees accrue 6.67 hours of Vacation per month; accrue up to 52 hours of sick leave annually; receive at least 96 hours for holidays. PTO, Vacation, sick leave, and holiday hours are prorated based on start date during the calendar year.
Free account
Stop reading job ads. Get the ones that fit.
One free account turns this page into a shortlist built around your stack, your level and your pay.
Match on every job. Stack, seniority, pay and location, scored against your profile.
368,611 open roles. Read straight off company career pages, refreshed every day.
Unlimited applications. Every one you send is tracked in one place, on-site or on a company board.
3 tailored CVs a month. Rewritten for the exact job you are applying to. Included free.
Create a free account
Free forever. No card. Under a minute.

Your match

How well do you fit this role?
Two answers are enough for a real match. No account needed.
Check my fit
Answers stay in this browser until you create an account.

Recommended for you based on this role

Similar stack
Same company
Orlando
$21k – $63k per year (gross) • In office • Full-Time
Chips/EDA
Cadence Innovus
Cadence Virtuoso
Synopsys Custom Compiler
Synopsys Design Compiler
Synopsys IC Compiler II
Synopsys PrimeTime
Apply
$21k – $63k per year (gross) • In office • Full-Time • Bachelor's Degree • Saint Petersburg
Chips/EDA
Cadence Innovus
Cadence Virtuoso
Synopsys Custom Compiler
Synopsys Design Compiler
Synopsys IC Compiler II
Synopsys PrimeTime
Apply
$45k – $108k per year (Estimated) • In office • Full-Time • 5+ years exp • Bachelor's Degree • Mexico
DevOps
HPC
Chips/EDA
Cadence Virtuoso
Apply
$102k per year • Remote/Hybrid • Full-Time • Reutlingen
Verilog
Chips/EDA
Cadence Virtuoso
Apply
$102k per year • Remote/Hybrid • Full-Time • Reutlingen
Verilog
Chips/EDA
Cadence Virtuoso
Apply
$98k – $182k per year • In office • Bachelor's Degree • Fort Worth
C++
Python
DevOps
CI/CD
GitLab
Apply
$136k – $252k per year • In office • 5+ years exp • Bachelor's Degree • Littleton
C++
Python
DevOps
Git
GitLab
Apply
$88k – $164k per year • In office
C#
TypeScript
JavaScript
C#
Entity Framework Core
Databases
MySQL
Frontend
Angular
NgRx
QA
Cypress
Jest
Apply
$88k – $164k per year • In office
C#
TypeScript
JavaScript
C#
Entity Framework Core
Databases
MySQL
Frontend
Angular
NgRx
QA
Cypress
Jest
Apply
$88k – $164k per year • In office
C#
TypeScript
JavaScript
C#
Entity Framework Core
Databases
MySQL
Frontend
Angular
NgRx
QA
Cypress
Jest
Apply
$120k – $140k per year • In office • Full-Time • Charlotte • Raleigh • Dallas • Boston • New York
SQL
Analytics
ETL/ELT
Apply
$73k – $133k per year • In office • Full-Time • 5+ years exp • Bachelor's Degree • Orlando
Bash
PowerShell
Python
DevOps
Ansible
Configuration Management
Docker
Git
Kubernetes
Kustomize
OpenShift
Puppet
Red Hat
Terraform
VMWare
Management
Confluence
Jira
Apply
$121k – $338k per year • In office • Full-Time • 10+ years exp • Bachelor's Degree • Wayne • Orlando • Washington • Atlanta • Hartford
AI/ML
Recommender Systems
Apply
$67k – $82k per year • Equity • In office • Full-Time • 3+ years exp • High School Diploma • Richmond • Orlando
DevOps
SLI/SLO/SLA
Apply
$100k – $150k per year • In office • Full-Time • 7+ years exp • Bachelor's Degree • Chicago • Charlotte • Los Angeles • Charleston • Washington
Python
SQL
Databases
Databricks
PostGIS
Snowflake
PostgreSQL
Analytics
Power BI
Tableau
Apply
See all jobs
This is one of many
368,611 more open roles from verified company boards, updated every day.