{"id":621899,"url":"https://alion.io/job/lumilens-ic-design-verification-engineer","title":"IC Design Verification Engineer","company":{"id":678172,"name":"Lumilens","domain":"lumilens.com","url":"https://alion.io/company/lumilens","size_band":"201-500","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Ashby","truth_index":{"grade":"A","score":93,"open_postings":56,"ghost_share":0,"stale_share":0.071,"repost_share":0,"time_to_fill_p50_days":118,"computed_at":"2026-10-16T05:45:00Z"}},"role":"Hardware","role_family":"Hardware","seniority":null,"employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["San Jose, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":116000,"max_usd":262000,"period":"year","method":"role_country_seniority_unknown","sample_n":2687},"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Cadence Palladium","optional":false},{"name":"Cadence Protium","optional":false},{"name":"Formal Verification","optional":false},{"name":"Perl","optional":false},{"name":"Python","optional":false},{"name":"Siemens Veloce","optional":false},{"name":"Synopsys HAPS","optional":false},{"name":"SystemVerilog","optional":false},{"name":"UVM","optional":false},{"name":"Verilog","optional":false}],"status":"live","first_seen_at":"2026-07-06T20:29:15Z","employer_posted_date":"2026-07-06","last_verified_at":"2026-10-17T01:09:46Z","board_verified":true,"closed_at":null,"days_open":102,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":102},"description":"About Lumilens\nAt Lumilens we are building the critical photonics infrastructure that powers tomorrow’s AI supercomputing. From chip-to-chip optical interconnects to scalable photonic engines, Lumilens is unlocking a new era of computing faster, cooler, and massively more efficient.\nWe’re a well-funded startup backed by Mayfield and led by veterans who’ve built and scaled some of the most transformative technologies in the industry.\nThis isn’t incremental innovation, it’s a ground-floor opportunity to rethink the optical layer from the silicon up. The market is moving fast, and we’re moving faster. You’ll work alongside a team of world-class engineers solving some of the hardest challenges in optics, systems, and scale. Every line of code, every design decision, every breakthrough you help deliver will shape the infrastructure of tomorrow.\nIf you're looking for mission, momentum, and the chance to make an outsized impact, jump on the rocket ship. We’re just getting started.\nAbout the Role\nYou verify the blocks and subsystems of a first-of-its-kind chiplet - building UVM testbenches, writing tests, and driving coverage to closure. Guided by the verification plan and methodology, you take assigned blocks from testbench bring-up through coverage signoff, and help debug across simulation and emulation. It’s a hands-on role with room to grow your scope as the team and the chip mature.\nWhat You'll Do\nBuild and extend UVM testbenches (agents, sequences, scoreboards) for assigned blocks and subsystems.\n\nWrite directed and constrained-random tests; develop functional coverage and drive it to closure.\n\nVerify the in-house engines against an algorithmic golden model, with programmable error injection and error-pattern coverage.\n\nIntegrate and use VIP (e.g., UCIe) and run compliance, link-training, loopback, and lane-repair scenarios.\n\nRun regressions, triage failures, and help maintain the CI/regression flow.\n\nRegister (UVM RAL) verification, firmware co-simulation, and boot flows on the MCU subsystem.\n\nMixed-signal co-simulation - verifying digital blocks against behavioral / real-number models of analog/mixed-signal blocks.\n\nSupport hardware-assisted verification - bring up and run tests on emulation / FPGA prototyping.\n\nParticipate in gate-level and low-power (UPF) verification during signoff.\n\nCollaborate with the design, architecture, modelling, and DFT teams as your blocks move through the flow.\n\nRequired\nBS or MS in Electrical/Computer Engineering (or equivalent experience).\n\n3+ years of ASIC/SoC functional verification.\n\nSolid UVM/SystemVerilog; constrained-random and coverage-driven verification.\n\nTestbench development and coverage closure - building block/subsystem testbenches and driving functional + code coverage to closure.\n\nStrong debug skills across simulation; scripting in Python, Perl, or TCL.\n\nFamiliarity with regression/CI flows and failure triage.\n\nPreferred\nHigh-speed SerDes, PAM4, or FEC/coding (Reed-Solomon) verification.\n\nUCIe, PCIe/CXL, Ethernet, or UALink VIP / compliance experience.\n\nMixed-signal verification (Verilog-AMS or SV real-number models).\n\nHardware-assisted verification - emulation (e.g., Palladium/Veloce) and/or FPGA prototyping (e.g., HAPS/Protium).\n\nLow-power/UPF and gate-level simulation; performance-verification methodology.\n\nExposure to NICs, Ethernet/IB switches, or cache-coherent fabrics (multi-core / coherent fabric).\n\nFormal verification for control/interlock logic; portable stimulus.\n\nWhat We Offer\nCompetitive salary commensurate with experience\n\nComprehensive benefits package including health, dental, and vision\n\nProfessional development opportunities and certification support\n\nAccess to cutting-edge technology and cloud platforms\n\nCollaborative work environment with cross-functional teams\n\nLumilens is an equal opportunity employer. All qualified applicants will receive consideration without regard to race, color, religion, gender identity, sexual orientation, veteran status, disability, or any other legally protected status.","description_format":"text","description_chars":4037,"description_truncated":false,"requirements":{"experience_years_min":null,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":["Professional development"],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Servers & Data Center Hardware","Optical Communications","Optics & Photonic Components"],"lifecycle":[{"event":"open","at":"2026-09-10T18:47:58Z"}],"visa":[{"country":"US","licensed_sponsor":true,"evidence":"Filed H-1B visas in the last two years","filings_12m":0,"filings_prev_12m":1,"green_card_filings_12m":0,"median_offered_wage_usd":null,"route":null,"cap_exempt":false,"checked_at":"2026-10-15T11:24:14+00:00","sources":["US Department of Labor: LCA disclosure data (H-1B, H-1B1, E-3)"],"filings_for_role_12m":0}],"liveness":{"score":41,"band":"fade","label":"Fading","p_open":1,"p_active":0.682,"p_room":0.6,"age_days":101,"expected_fill_days":118,"reasons":["conf:2","velocity","win:late","crowd:brand"],"computed_at":"2026-10-16T05:45:00Z"},"pay":null,"html_url":"https://alion.io/job/lumilens-ic-design-verification-engineer","json_url":"https://alion.io/job/lumilens-ic-design-verification-engineer.json","meta":{"generated_at":"2026-10-17T05:02:12Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":6628,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-18T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":678172},"rest":"https://alion.io/mcp/rest/get_company?id=678172"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Flumilens-ic-design-verification-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Flumilens-ic-design-verification-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Flumilens-ic-design-verification-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/lumilens-ic-design-verification-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Flumilens-ic-design-verification-engineer"}]}