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Salary
≈ $84k – $174k per year (Estimated)
Location
In office (Cambridge)
Seniority
Principal · 10+ years exp
Employment
Full-Time

Confirmed on the employer's own hiring board on Sep 28, 2026. First seen by Alion on Sep 4, 2026. Manning Global scores B on the Alion truth index.

Overview
Company
Impact
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Manning Global. Manning Global is currently partnering on worldwide Projects with many Blue Chip Companies within the Telecoms, IT, ICT, Hospitality, Oil and Gas, Pharmaceutical, Finance, Media and Banking sectors.
Manning Global, a premier global staffing and managed services provider, specializing in worldwide leading Industry sectors such as ICT, AI, Technology, Digital Media, Engineering, Automotive and Energy, is recruiting for a Principal Kernel Engineer on behalf of one of their top-tier international clients to join their organization in the UK. Job Title: Principal Kernel Engineer Employment: Full time Start Date: July, 2026 Country: Cambridge, UK - Office based Salary range: Dependant upon Experience Contact: Zuni Gonzalez | +49 (0) 89 23 88 98 456

Key

Responsibilities: Optimize memory management internals: buddy allocator, slab/SLUB, page reclaim and LRU/MGLRU, memory compaction and defragmentation, transparent huge pages, page-fault and TLB-shootdown paths, copy-on-write behaviour. Drive scheduler performance: run-queue and load-balancing behaviour, energy-aware scheduling, wakeup latency, task placement on heterogeneous (big.LITTLE/DynamIQ) topologies, cpufreq/cpuidle governor interaction. Optimize synchronization primitives and lock-heavy paths: futex fast/slow paths, mutexes and rwsems, spinlocks/qspinlocks, RCU, seqlocks, per-CPU data, memory ordering and barriers on ARM64. Analyse and improve IPC and syscall paths: context-switch cost, binder-style IPC, shared memory, vDSO, interrupt/softirq handling. Identify bottlenecks on flagship mobile workloads (gaming, day-of-use, camera, AI inference) using PMU counters, ftrace/perf, eBPF, lockdep/lockstat, and power measurement with mA/mAh attribution. Land production-quality kernel patches from hypothesis through benchmarking to ship, with measured latency and energy impact. Collaborate with CPU microarchitects on HW-SW co-design: exploit microarchitectural features in the kernel and shape future hardware through kernel-driven requirements. Contribute to AI-assisted kernel optimization pipelines (automated analyze → patch → benchmark → validate loops). This job description is only an outline of the tasks, responsibilities and outcomes required of the role. The jobholder will carry out any other duties as may be reasonably required by his/her line manager. The job description and personal specification may be reviewed on an ongoing basis in accordance with the changing needs. Experience/Qualifications: 10+ years of OS kernel development in C (Linux or comparable), with patches shipped to production systems at scale. Expert-level understanding of MM internals: physical/virtual memory management, buddy and slab allocation, reclaim, compaction, page tables, TLB management. Deep scheduler knowledge: CFS/EEVDF internals, load balancing, preemption, real-time classes, energy-aware scheduling. Mastery of kernel synchronization: locking primitives, RCU, lock-free techniques, the ARM64 memory model and barrier semantics. Proven kernel performance-analysis skills: PMU counters, ftrace/perf, eBPF, lock contention and latency analysis. Strong ARM64 architecture grounding: exception levels, cache hierarchy and maintenance, TLBs, memory ordering. Desired Skills: Mobile power engineering: DVFS governors, cpuidle, per-workload energy attribution. Upstream Linux kernel contributions (mm, sched, locking, or related subsystems). Familiarity with HarmonyOS or Android common kernel. Exposure to CPU microarchitecture and cycle-accurate modelling (gem5). Experience with LLM/agentic tooling applied to systems software. Languages: English.

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