{"id":1185275,"url":"https://alion.io/job/mediatek-2027-internship-memory-design-automation-memory-modeling","title":"[2027 Internship] Memory Design Automation - Memory modeling","company":{"id":62191,"name":"MediaTek","domain":"mediatek.com","url":"https://alion.io/company/mediatek","size_band":"1001-5000","is_staffing_agency":false,"is_intermediary":false,"listed_via":null,"ats_vendor":"Career site","truth_index":null},"role":"Early Careers","role_family":"Early Careers","seniority":"intern","employment_type":"internship","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Singapore"],"countries":["SG"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":32000,"max_usd":62000,"period":"year","method":"global_role_cell_scaled_by_country","sample_n":181},"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Perl","optional":false},{"name":"Python","optional":false}],"status":"live","first_seen_at":"2026-08-25T16:00:00Z","employer_posted_date":"2026-09-24","last_verified_at":"2026-09-25T02:30:43Z","board_verified":true,"closed_at":null,"days_open":30,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":30},"description":"[About the team]The MediaTek’s Memory modelling team collaborates with the world-wide memory design teams to create and qualify front-end models for use in the ASIC design flow. Team members will also be expected to perform circuit design verification to ensure memory circuits robustness.\n[What you will do]\n- Lead the development and coding of front-end design kits, including memory RTL models, ATPG models, and other views essential for ASIC design flow.\n- Create and optimize automation flows and scripts using Perl or Python to enhance workflow efficiency and ensure model accuracy.\n- Utilize EDA tools from vendors such as Synopsys and Mentor Graphics to validate model correctness.\n- Maintain up-to-date knowledge of current modeling standards and advancements from EDA tool vendors to enhance memory IP performance and meet the latest ASIC design flow requirements.\n- Ensure the functional correctness of memory circuits by validating them against memory models.\n- Collaborate with the memory design team and compiler development team to deliver comprehensive memory front-end design kits.\n- Troubleshoot and resolve model issues in collaboration with RTL designers, design verification teams, DFT teams, and tool vendors.","description_format":"text","description_chars":1231,"description_truncated":false,"requirements":{"experience_years_min":null,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":null,"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Semiconductors","Wireless"],"lifecycle":[{"event":"open","at":"2026-09-24T14:44:02Z"}],"liveness":{"score":13,"band":"cold","label":"Long shot","p_open":1,"p_active":0.448,"p_room":0.28,"age_days":30,"expected_fill_days":14,"reasons":["conf:0","win:tail","crowd:junior,brand"],"computed_at":"2026-09-25T03:27:27Z"},"pay":null,"html_url":"https://alion.io/job/mediatek-2027-internship-memory-design-automation-memory-modeling","json_url":"https://alion.io/job/mediatek-2027-internship-memory-design-automation-memory-modeling.json","meta":{"generated_at":"2026-09-25T03:27:27Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","usage":{"tier":"crawler","counted_by":"address","units_charged":1,"used_today":3805,"day_limit":5000,"remaining_today":1195,"minute_limit":60,"resets_at":"2026-09-26T00:00:00Z"}}}