{"id":1185304,"url":"https://alion.io/job/mediatek-2027-internship-physical-verification-software-cad-intern","title":"[2027 Internship] Physical Verification Software CAD Intern","company":{"id":62191,"name":"MediaTek","domain":"mediatek.com","url":"https://alion.io/company/mediatek","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Career site","truth_index":{"grade":"A","score":86,"open_postings":361,"ghost_share":0.147,"stale_share":0,"repost_share":0,"time_to_fill_p50_days":118,"computed_at":"2026-10-14T06:34:16Z"}},"role":"Early Careers","role_family":"Early Careers","seniority":"intern","employment_type":"internship","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Singapore"],"countries":["SG"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":18500,"max_usd":36000,"period":"year","method":"global_role_cell_scaled_by_country","sample_n":621},"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Linux","optional":false},{"name":"Python","optional":false}],"status":"live","first_seen_at":"2026-08-20T16:00:00Z","employer_posted_date":"2026-09-24","last_verified_at":"2026-10-15T00:02:43Z","board_verified":true,"closed_at":null,"days_open":55,"trust":{"level":"ok","repost_count":0,"flags":["company_stale"],"days_open":54},"description":"When you join us, you’ll work alongside with experienced engineers who’ll mentor and guide you.You will be involved in:\nExecute design rule checks on real chip design\nDebug real issues related to design rule checks happening at full chip integration\nDo basic reporting on physical verification issues\nBasic project management/project risk assessment reporting\nBasic scripting automation\nLearning Outcomes:\nYou will be able to\nBe familiar with linux environment\nDeep knowledge of Physical Verification in chip tape-out operations\nUnderstand and be exposed to the process of Full chip construction\no from individual IPs (IO/Analog/digital), necessary physical structures (eg. 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