{"id":1185707,"url":"https://alion.io/job/mediatek-design-verification-engineer-2","title":"Design Verification Engineer","company":{"id":62191,"name":"MediaTek","domain":"mediatek.com","url":"https://alion.io/company/mediatek","size_band":"1001-5000","is_staffing_agency":false,"is_intermediary":false,"listed_via":null,"ats_vendor":"Career site","truth_index":null},"role":"Hardware","role_family":"Hardware","seniority":null,"employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Hsinchu, Taiwan"],"countries":["TW"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":45000,"max_usd":116000,"period":"year","method":null,"sample_n":2006},"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[],"status":"live","first_seen_at":"2019-03-11T16:00:00Z","employer_posted_date":"2026-09-24","last_verified_at":"2026-09-25T02:30:43Z","board_verified":true,"closed_at":null,"days_open":2754,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":2754},"description":"As deep sub-micron process requires longer research cycle and higher manufacture cost, DV(design verification) has become an inevitable part of design group in Mediatek chip development flow.CDG DV is in charge of development and implementation of smart phone, TV, and ASIC product line verification plan.\nIt included: integrated simulation/verification env development, big data analysis and efficiency improvement, bus fabric / EMI (External memory interface ) / Low power functions verification plan and implementation\nNeed to build up verification plan/bench and continuously improve methodology, and you will understand both detail scenario and global view of cell phone/ASIC operating schemes\nNeed to leverage the latest EDA tool and concept to accomplish the verification plan\nWork location: Hsinchu\n#LI-CH3","description_format":"text","description_chars":814,"description_truncated":false,"requirements":{"experience_years_min":null,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":null,"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Semiconductors","Wireless"],"lifecycle":[{"event":"open","at":"2026-09-24T14:44:02Z"}],"liveness":{"score":3,"band":"cold","label":"Long shot","p_open":1,"p_active":0.095,"p_room":0.28,"age_days":2754,"expected_fill_days":22,"reasons":["conf:0","win:tail","crowd:brand"],"computed_at":"2026-09-25T03:17:13Z"},"pay":null,"html_url":"https://alion.io/job/mediatek-design-verification-engineer-2","json_url":"https://alion.io/job/mediatek-design-verification-engineer-2.json","meta":{"generated_at":"2026-09-25T03:17:13Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","usage":{"tier":"crawler","counted_by":"address","units_charged":1,"used_today":3617,"day_limit":5000,"remaining_today":1383,"minute_limit":60,"resets_at":"2026-09-26T00:00:00Z"}}}