{"id":1196628,"url":"https://alion.io/job/mediatek-seniorstaff-layout-engineer","title":"Senior/Staff Layout engineer","company":{"id":62191,"name":"MediaTek","domain":"mediatek.com","url":"https://alion.io/company/mediatek","size_band":null,"is_staffing_agency":false,"is_intermediary":false,"listed_via":null,"ats_vendor":"Career site","truth_index":null},"role":"Hardware","role_family":"Hardware","seniority":"staff","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Cairo, Egypt"],"countries":["EG"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":99000,"max_usd":199000,"period":"year","method":"global_role_cell_scaled_by_country","sample_n":316},"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[],"status":"live","first_seen_at":"2026-09-23T16:00:00Z","employer_posted_date":"2026-09-24","last_verified_at":"2026-09-24T22:49:28Z","board_verified":true,"closed_at":null,"days_open":1,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":1},"description":"The Analog Design and Circuit Technology team at MediaTek Egypt is searching for qualified candidates to join our fast-growing team. As a member of this dynamic team, you will get to work on state-of-the-art next generation wireline and optical transceivers for data centers serving cloud infrastructure as well as the growing field of AI and high-performance computing. We are looking for ambitious layout engineers, who are willing to learn, grow and contribute to diverse portfolio of products.Job Description:\nOwn full-custom layout for analog and mixed-signal IPs (e.g., ADCs, PLLs, LDOs, bandgaps, high-speed interfaces)\nWork closely with circuit designers to optimize layout for performance and area.\nPerform detailed floor planning and transistor-level layout\nEnsure designs are DRC/LVS/ERC clean and meet all physical verification requirements\nSupport post-layout simulations and sign-off procedures\n•Handle LDE, EM/IR, and parasitic effects in advanced process nodes","description_format":"text","description_chars":976,"description_truncated":false,"requirements":{"experience_years_min":null,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":null,"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Semiconductors","Wireless"],"lifecycle":[{"event":"open","at":"2026-09-24T18:50:52Z"}],"liveness":{"score":86,"band":"hot","label":"Hiring now","p_open":1,"p_active":0.86,"p_room":1,"age_days":1,"expected_fill_days":31,"reasons":["conf:2","win:early","comp:brand"],"computed_at":"2026-09-25T01:18:54Z"},"pay":null,"html_url":"https://alion.io/job/mediatek-seniorstaff-layout-engineer","json_url":"https://alion.io/job/mediatek-seniorstaff-layout-engineer.json","meta":{"generated_at":"2026-09-25T01:18:54Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","usage":{"tier":"crawler","counted_by":"address","units_charged":1,"used_today":1291,"day_limit":5000,"remaining_today":3709,"minute_limit":60,"resets_at":"2026-09-26T00:00:00Z"}}}