Engineer I-Design
Confirmed on the employer's own hiring board on Oct 11, 2026. First seen by Alion on Oct 9, 2026.
Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology Inc.
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Job Description:
Summary
As a member of Microchip’s engineering community, your primary responsibility will be to design, simulate, and verify various RTL-based blocks on our devices. Microchip’s designs are an SOC with various hard and soft IP blocks that support many industry standard protocols for Imaging, Networking System Connectivity, Compute and Data Storage.
Duties & Responsibilities:
General RTL and ASIC development
- Detailed module design, performance analysis and detailed design specification creation.
- Participate in the RTL implementation, synthesis, simulation, pre-layout/post-layout timing verification.
- Understanding of emerging high speed design techniques to improve Data & Command processing bandwidth, reduce latencies & increase reliability.
- Support porting the design into test chips and emulation platforms - experience with FPGA design and board implementation tools is advantageous.
Requirements/Qualifications:
- 0-2.5 years of experience in RTL Design for ASIC implementation.
- Bachelor’s in Electrical Engineering, Computer Engineering or Computer Science.
- Design courses and practical application of course learning for high-speed RTL design.
- Experience with RTL Design tools that include design entry, synthesis, formal verification, RTL/gate level simulation, cross-domain clocking analysis and static timing analysis.
- Course and Practical usage in RTL design, design verification, synthesis & formality.
- Proficiency in SystemVerilog development languages.
- Course and Practical usage in Static Timing Analysis and Verilog simulation tools.
- Should be able to design complex state machines & data path logic.
- Proficiency in scripting languages (TCL / Perl / Python) and LINUX.
- Ability to understand and implement industry standards.
- Ability to write detailed design specifications.
- Good analytical, oral and written communication skills.
- Able to write clean, readable presentations.
- Self-motivated, proactive team player.
- Ability to work to schedule requirements.
Preferred
- Master’s in Electrical Engineering, Computer Engineering or Computer Science.
- FPGA and ASIC System On Chip Design Experience.
- Lab Experience for system-level validation.
Travel Time:
0% - 25%Physical Attributes:
Hearing, Other, Seeing, Talking, Works Alone, Works Around OthersPhysical Requirements:
100% inside, 80% sitting, 10% standing, 10% walkingMicrochip Technology Incis an equal opportunity/affirmativeaction employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law.
For more information on applicable equal employment regulations, please refer to the Know Your Rights: Workplace Discrimination is Illegal Poster.
To all recruitment agencies: Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.