{"id":2256257,"url":"https://alion.io/job/microchip-senior-engineer-ii-backend-implementation","title":"Senior Engineer II - Backend Implementation","company":{"id":44188,"name":"Microchip Technology","domain":"microchip.com","url":"https://alion.io/company/microchip","size_band":"201-500","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":null},"role":"Backend","role_family":"Backend","seniority":"senior","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"explicit","locations":["Bengaluru, India"],"countries":["IN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":16500,"max_usd":38000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":133},"experience_years_min":7,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Cadence Conformal","optional":false},{"name":"Perl","optional":false},{"name":"Python","optional":false},{"name":"Synopsys Fusion Compiler","optional":false},{"name":"Synopsys PrimeTime","optional":false},{"name":"Verilog","optional":false}],"status":"live","first_seen_at":"2026-09-15T00:00:00Z","employer_posted_date":"2026-09-15","last_verified_at":"2026-10-12T10:07:22Z","board_verified":true,"closed_at":null,"days_open":27,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":27},"description":"Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology Inc.\nPeople come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip’s nationally-recognizedLeadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the Aggregate System and it’s won us countless awards for diversity and workplace excellence.\nOur company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you.\nVisit our careers page to see what exciting opportunities and company perks await!\nJob Description:\nCompany Description\nMicrochip Technology Inc. is a leading provider of embedded control applications. Our product portfolio comprises general purpose and specialized 8-bit, 16-bit, and 32-bit microcontrollers, 32-bit microprocessors, field-programmable gate array (FPGA) products, a broad spectrum of high-performance linear, mixed-signal, power management, thermal management, radio frequency (RF), timing, safety, security, wired connectivity and wireless connectivity devices, as well as serial Electrically Erasable Programmable Read Only Memory (EEPROM), Serial Flash memories, Parallel Flash memories, and serial Static Random Access Memory (SRAM). We also license Flash-IP solutions that are incorporated in a broad range of products.\nJob Description\nMicrochip AES Design team looking for an experienced and motivated Backend Implementation Engineer to perform STA for larger SOCs. As a member of Implementation team, you will be responsible for timing constraints (SDC) generation, timing closure and Low Power checks for multiple blocks and top level. The candidate should have strong experience with STA tools like Tempus/Primetime. The candidate should have in depth knowledge of timing constraints.\nLocation: Bangalore, India\nRequirements/Qualifications:\nJob Responsibilities:\nThe employee is responsible for implementation activities of multiple large & complex blocks & sub-system implementation from 16nm to 3nm and below technology nodes. The employee is expected to take ownership of Full Chip/Subsystem complex design & flow challenges, which would include:\nPerform STAtiming closure for multi-million hierarchical complex designs.\nLead and drive team members to complete Implementation activities.\nComplete timing closure for blocks & top level in advanced nodes.\nDevelop constraints/SDCand perform pre & post-layout timing closure.\nPerform CLP and LEC for both full chip and block level.\nExperience on UPF/CPF would be an added advantage.\nOptimize design performance through timing closure and power optimization.\nDevelop and maintain design constraints and timing models.\nAnalyze and debug timing issues.\nInserting DFT logic for both block and top level.\nAnalyze Physical timing challenges and provide guidance for placement & CTS.\nOccasional travel needed.\nUse metric-driven techniques to help ensure first-pass working silicon.\nCommunicate regularly with the implementation and project team to resolve issues, and communicate status to Project Management.\nJob Qualifications:\nThis position requires at least B.E/B.Tech/M.Tech in Electronics with 7+ years of STA experience in a fast-paced environment with following experience.\nExpertise in Implementation activities: STA.\nStatic Timing/Crosstalk Analysis and timing closure\nMust have understanding of DFT insertion.\nExpertise with Synthesis & STA Tools (Genus, Fusion Compiler, Primetime or Tempus).\nExperience on Conformal LEC and CLP will be added advantage.\nStrong programming knowledge in Perl, TCL, and/or Shell and Python Scripting\nExcellent oral and written communications skills to work with teams across the globe\nStrong understanding of timing closure and power optimization techniques\nMust have good understanding of Verilog.\nTravel Time:\n0% - 25%To all recruitment agencies: Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. 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