{"id":2256101,"url":"https://alion.io/job/microchip-senior-technical-staff-engineer-validation-system-design-2","title":"Senior Technical Staff Engineer - Validation (System Design)","company":{"id":44188,"name":"Microchip Technology","domain":"microchip.com","url":"https://alion.io/company/microchip","size_band":"201-500","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":null},"role":"Hardware","role_family":"Hardware","seniority":"staff","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["San Jose, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":{"min":91000,"max":232000,"currency":"USD","period":"year","gross":null,"usd_annual":232000},"salary_estimate":null,"experience_years_min":15,"visa_sponsorship":false,"relocation_package":false,"has_equity":true,"technologies":[{"name":"Siemens ModelSim","optional":false},{"name":"Verilog","optional":false},{"name":"VHDL","optional":false},{"name":"C++","optional":true},{"name":"Python","optional":true},{"name":"TCL Scripting","optional":true}],"status":"live","first_seen_at":"2026-10-08T00:00:00Z","employer_posted_date":"2026-10-08","last_verified_at":"2026-10-11T19:41:21Z","board_verified":true,"closed_at":null,"days_open":3,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":3},"description":"Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology Inc.\nPeople come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip’s nationally-recognizedLeadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the Aggregate System and it’s won us countless awards for diversity and workplace excellence.\nOur company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you.\nVisit our careers page to see what exciting opportunities and company perks await!\nJob Description:\nMicrochip Technology Inc. is a leading provider of embedded control applications. Our product portfolio comprises general purpose and specialized 8-bit, 16-bit, and 32-bit microcontrollers, 32-bit microprocessors, field-programmable gate array (FPGA) products, a broad spectrum of high-performance linear, mixed-signal, power management, thermal management, radio frequency (RF), timing, safety, security, wired connectivity and wireless connectivity devices, as well as serial Electrically Erasable Programmable Read Only Memory (EEPROM), Serial Flash memories, Parallel Flash memories, and serial Static Random Access Memory (SRAM). We also license Flash-IP solutions that are incorporated in a broad range of products.\nMicrochip Technology Inc. has a Senior Technical Staff Engineer - Validation (System Design) opening based in San Jose, CA. The candidate will be an expert with lab bring up and automation of FPGA design creation and validation; and be able to use FPGAs to create systems level designs; also possess expertise in development of partial re-configuration use cases. The successful candidate will be responsible for the below.\nBe an expert with use of FPGAs to create systems level designs to bring up and debug such systems in the lab, including having deep experience in validating systems level UCs for partial reconfiguration\nArchitecture definition and FPGA design creation utilizing all hardware features and IP cores targeted to existing and future Microchip products.\nSystem and FPGA design must exercise all the use models targeted for each product mimicking end applications in a customer setting.\nDevelop high level system and product level validation plans for new and existing silicon products and project, execute per plan. Review dependencies, estimate effort and identify and communicate risk.\nUnderstand hardware architectures, define use models and execute / oversee system level design implementations required to utilize the silicon features.\nBe not only an effective contributor but also the technical expert related to protocols using high speed serial interfaces in a cross-functional team-oriented environment.\nWrite high quality code in Verilog, VHDL and C code. Maintain existing code. Support regression and re-use.\nLearn new system designs and validation methodologies. Understand FPGA architectures.\nAct as the authoritative expert in knowledge domain area(s), be able to mentor senior and junior engineers and provide technical guidance. This involves assigning and monitoring tasks of employees and contractors.\nCollaborate with cross-functional managers/teams to identify and resolve inter-dependencies.\nDefine and improve process followed in the department; follow quality metrics and assess per project.\nMust be willing to take regular late night or early morning calls to interface with the engineering team in India Standard Time zone, when and if required.\nUse AI based tools to automate workflows and help improve the FPGA design and validation processes\nRequirements/Qualifications:\nBSEE / BSCS or equivalent with 15+ years of experience\n\nMSEE / MSCS preferred\n\nKnowledge of FPGA architectures is a must\n\nPossess an in-depth understanding of hardware architectures, system level IC design implementation, and knowledge of how to create end use scenarios\n\nStrong technical background in FPGA prototype emulation, and debug\n\nStrong technical background in silicon validation, failure analysis and debug\n\nExcellent Board level debug capabilities in lab environment: hands-on troubleshooting skills for digital logic and analog circuit on PCB’s using oscilloscopes, digital analyzers, protocol exercisers and analyzers, integrated logic analyzers (e.g. Synopsys Identify, Xilinx Chipscope, Altera Signalscope, Lattice Reveal)\n\nDesign with RTL coding in Verilog and VHDL is a must\n\nExperience using Simulation (ModelSim) and Synthesis (Synplicity) tools\n\nGood knowledge of validating system level designs based on embedded processors and peripherals such as SPI, I2C, UART, Ethernet, PCI and USB\n\nFamiliarity with the bring up and on-board debug of 32Gbps SERDES\n\nHands-on systems level design and debug experience with following high-speed serial communications protocols (must: PHY, PCS and Data link layer of the OSI protocol stack; desirable: transaction and upper layers of the OSI protocol):\n\nProtocol Testing at UNH for various IEEE Clauses pertaining to\n\nLayer 1/2/3 of Gigabit Etherent\n\nPCIe Gen3/4/5\n\nExperience with the Lab Equipment\n\nSpirent Test Center or equivalent Traffic Generators and Checkers\n\nPCIe Analyzer & PCIe Exerciser\n\nStrong commitment to quality and customer satisfaction\n\nExcellent verbal and written communication skills in English\n\nAble to travel 0-2 times annually if required.\n\nC, C++ or object-oriented programming skills is required\n\nKnowledge and experience in embedded firmware development\n\nKnowledge and experience in JTAG, SVF and 1532 standards and STAPL programming is desirable\n\nExperience with Python/PERL/TCL scripting\n\nPreferred qualifications\nFamiliarity with any high speed SERDES controllers that make use of 32Gbps PCS, PMA :\nEthernet 1, 2.5, 5, 10, 25, 40, 50, 100, 200, 400 Gbps, including familiarity with (U)S(X)GMII\n\nInterlaken (4.25 to 412.5 Gbps)\n\nOTN OTUx (2.66 to 131 Gbps), or SONET/SDH OC3/12/48/192\n\n(E,X,XGS,NG)-PON or 100G-EPON\n\nVideo interfaces SDI-SD/HD/3GHD and SDI (5.94, 11.88Gbps), Displayport (6.48 to 25.92Gbps), HDMI (3.96 to 42.66 Gbps)\n\nJESD204C (6.375 to 32 Gbps)\n\nDesign and debug experience for any of the below high-speed serial communications protocols is a plus, but not necessary:\nHybrid Memory Cube\nCPRI Rate 1 to 10+\nSerial Rapid IO 4.1\nUSB 3.0\nSATA I, II, III\nFiber Channel\nCoaXpress\nPercentage of time spent: \nDocumentation - 15%\nDesign Creation & Verification - 25%\nLab Bringup & Debug - 60%\nEssential Physical Functions and Working Conditions:\n50 % work in front of computer\n50% work in the lab\nTravel Time:\n0% - 25%Physical Attributes:\nFeeling, Handling, Hearing, Seeing, Talking, Works Alone, Works Around OthersPhysical Requirements:\n70% sitting, 15% standing, 15% walking; 100% in doors; Usual business hours.Pay Range:\nWe offer a total compensation package that ranks among the best in the industry. It consists of competitive base pay, restricted stock units, and quarterly bonus payments. In addition to these components, our package includes health benefits that begin day one, retirement savings plans, and an industry leading ESPP program with a 2 year look back feature. Find more information about all our benefits at the link below:Benefits of working at Microchip\nThe annual base salary range for this position, which could be performed in the US, is $91,000 - $232,000.**Range is dependent on numerous factors including job location, skills and experience.\nMicrochip Technology Incis an equal opportunity/affirmativeaction employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law.\nFor more information on applicable equal employment regulations, please refer to the Know Your Rights: Workplace Discrimination is Illegal Poster.\nTo all recruitment agencies: Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.","description_format":"text","description_chars":9008,"description_truncated":false,"requirements":{"experience_years_min":15,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":null,"security_clearance":false,"languages":[{"language":"English","level":"All levels","optional":true}]},"benefits":["Restricted stock units","Retirement plans"],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Processors, MCUs & AI Chips"],"lifecycle":[{"event":"open","at":"2026-10-11T04:01:33Z"}],"visa":[],"liveness":{"score":86,"band":"hot","label":"Hiring now","p_open":1,"p_active":0.86,"p_room":1,"age_days":3,"expected_fill_days":51,"reasons":["conf:3","win:early","comp:brand"],"computed_at":"2026-10-11T23:38:16Z"},"pay":{"stated_usd_annual":232000,"is_top_pay":false},"html_url":"https://alion.io/job/microchip-senior-technical-staff-engineer-validation-system-design-2","json_url":"https://alion.io/job/microchip-senior-technical-staff-engineer-validation-system-design-2.json","meta":{"generated_at":"2026-10-11T23:38:16Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":14763,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-12T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":44188},"rest":"https://alion.io/mcp/rest/get_company?id=44188"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fmicrochip-senior-technical-staff-engineer-validation-system-design-2"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fmicrochip-senior-technical-staff-engineer-validation-system-design-2"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fmicrochip-senior-technical-staff-engineer-validation-system-design-2"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/microchip-senior-technical-staff-engineer-validation-system-design-2\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fmicrochip-senior-technical-staff-engineer-validation-system-design-2"}]}