{"id":2894700,"url":"https://alion.io/job/microchip-technology-principal-engineer-design-5","title":"Principal Engineer - Design","company":{"id":44188,"name":"Microchip Technology","domain":"microchip.com","url":"https://alion.io/company/microchip","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"B","score":75,"open_postings":105,"ghost_share":0,"stale_share":1,"repost_share":0,"time_to_fill_p50_days":28,"computed_at":"2026-10-23T05:54:15Z"}},"role":"Hardware","role_family":"Hardware","seniority":"lead","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Roseville, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":{"min":75000,"max":232000,"currency":"USD","period":"year","gross":null,"usd_annual":232000},"salary_estimate":null,"experience_years_min":10,"visa_sponsorship":false,"relocation_package":false,"has_equity":true,"technologies":[{"name":"Bash","optional":false},{"name":"Cadence Palladium","optional":false},{"name":"Cadence Protium","optional":false},{"name":"Linux","optional":false},{"name":"Python","optional":false},{"name":"SAS","optional":false},{"name":"SystemVerilog","optional":false},{"name":"Verilog","optional":false},{"name":"VHDL","optional":false},{"name":"Windows","optional":false},{"name":"RTOS","optional":true}],"status":"live","first_seen_at":"2026-08-05T00:00:00Z","employer_posted_date":"2026-08-05","last_verified_at":"2026-10-22T02:03:48Z","board_verified":true,"closed_at":null,"days_open":79,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":79},"description":"Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology Inc.\nPeople come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip’s nationally-recognizedLeadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the Aggregate System and it’s won us countless awards for diversity and workplace excellence.\nOur company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you.\nVisit our careers page to see what exciting opportunities and company perks await!\nJob Description:\nThe Architecture Co-Verification team (ACOV) is an exciting, fast paced team responsible for enabling HW/FW development and co-verification of state-of-art System-On-Chip (SoC) devices using industry leading HW emulators (such as Cadence Palladium and Protium).\nThe team is deployed in all aspects of SoC development phases from architectural exploration to post-silicon validation, HW/FW co-development, pre-silicon functional co-verification, pre/post-silicon performance testing, power analysis, and critical post-silicon investigations.\nAs a Principal Design Engineer, you will be working closely with hardware designers, firmware engineers, and verification teams throughout the SoC development process. This is a role for a versatile engineer that enjoys the challenges of HW/FW co-development and system level co-verification using leading edge HW emulators and FPGA platforms. It’s a high visibility role that will develop a wide range of skills and exceptional problem-solving ability.\nResponsibilities could include but are not limited to the following:\nPorting SoC RTL to industry leading HW emulators and FPGA platforms.\nDeveloping emulation specific HW for pre-silicon subsystem/system level co-verification.\nDeveloping common test ecosystem across pre/post silicon.\nDeveloping FW and tests for pre-silicon subsystem/system level co-verification.\nTroubleshoot and resolve complex problems in embedded multi-core real-time systems executing emulation test plans.\nUtilize state of the art protocol analyzers for analysis and error injection.\nUtilization of test and defect tracking tools to document and report on verification progress and product quality.\nEffectively present technical information to small teams of engineers.\nRequirements/Qualifications:\nBS/MS degree or higher in Electrical/Electronic Engineering or Computer Engineering\n10+ years of relevant work experience\n5+ years' experience with one or more serial protocols such as SAS/SATA/NVMe and a thorough knowledge of PCIe\nKnowledge of key components of a server and storage solution including Windows/Linux host driver architectures.\nWilling to learn in a fast-paced environment, and being an organized self-starter.\nProficient Linux experience and strong programming/scripting skills with languages such as C, Python, Tcl and Bash.\nProficient in digital design, RTL coding with VHDL, Verilog, or System Verilog experience.\nCreation & management of system validation testing schedules and their execution.\nKnowledge of MIPS, ARM, or RISC-V architecture, including JTAG, I2C, and firmware programming.\nDesired Skills:\nExcellent analytical and documentation skills.\nStrong problem solving, communication and interpersonal skills are required.\nAbility to quickly learn new technologies.\nHighly motivated team player who sets personal goals and achieves those goals without supervision.\nExperience with RAID HBA’s, SAS Controllers and their associated Software Testing Strategies in an asset.\nExperience with test automation, testing methodologies, and test tools\nIsolation and resolution of complex software & firmware problems in embedded real-time systems.\nTroubleshoot and resolve complex problems in embedded multi-core real-time systems.\nKnowledge of Embedded Linux development as well as RTOS constructs including processes, threads, scheduling, synchronization mechanisms, memory management.\nCadence infrastructure support and process flows is an asset.\nTravel Time:\n0% - 25%Physical Attributes:\nCarrying, Feeling, Handling, Hearing, Seeing, Talking, Works Alone, Works Around OthersPhysical Requirements:\nRegular business hours; 70% sitting, 15% standing, 15% walkingPay Range:\nWe offer a total compensation package that ranks among the best in the industry. It consists of competitive base pay, restricted stock units, and quarterly bonus payments. In addition to these components, our package includes health benefits that begin day one, retirement savings plans, and an industry leading ESPP program with a 2 year look back feature. Find more information about all our benefits at the link below:Benefits of working at Microchip\nThe annual base salary range for this position, which could be performed in the US, is $75,000 - $232,000.**Range is dependent on numerous factors including job location, skills and experience.\nMicrochip Technology Incis an equal opportunity/affirmativeaction employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law.\nFor more information on applicable equal employment regulations, please refer to the Know Your Rights: Workplace Discrimination is Illegal Poster.\nTo all recruitment agencies: Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.","description_format":"text","description_chars":6505,"description_truncated":false,"requirements":{"experience_years_min":10,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":["Restricted stock units","Retirement plans"],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Processors, MCUs & AI Chips","Analog & Power Semiconductors"],"lifecycle":[{"event":"open","at":"2026-10-20T04:12:14Z"}],"visa":[],"liveness":{"score":11,"band":"cold","label":"Long shot","p_open":1,"p_active":0.403,"p_room":0.28,"age_days":79,"expected_fill_days":28,"reasons":["conf:27","stale_co","velocity","win:tail","crowd:brand"],"computed_at":"2026-10-23T05:54:15Z"},"pay":{"stated_usd_annual":232000,"is_top_pay":true},"html_url":"https://alion.io/job/microchip-technology-principal-engineer-design-5","json_url":"https://alion.io/job/microchip-technology-principal-engineer-design-5.json","meta":{"generated_at":"2026-10-23T16:45:02Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":25384,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-24T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":44188},"rest":"https://alion.io/mcp/rest/get_company?id=44188"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fmicrochip-technology-principal-engineer-design-5"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fmicrochip-technology-principal-engineer-design-5"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fmicrochip-technology-principal-engineer-design-5"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/microchip-technology-principal-engineer-design-5\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fmicrochip-technology-principal-engineer-design-5"}]}