{"id":2877451,"url":"https://alion.io/job/microchip-technology-senior-engineer-i-asic-verification","title":"Senior Engineer I - ASIC Verification","company":{"id":44188,"name":"Microchip Technology","domain":"microchip.com","url":"https://alion.io/company/microchip","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":null},"role":"Hardware","role_family":"Hardware","seniority":"senior","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["George Town, Malaysia"],"countries":["MY"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":18000,"max_usd":41000,"period":"year","method":"global_role_cell_scaled_by_country","sample_n":1777},"experience_years_min":10,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Cadence Xcelium","optional":false},{"name":"Synopsys VCS","optional":false},{"name":"Synopsys Verdi","optional":false},{"name":"SystemVerilog","optional":false},{"name":"UVM","optional":false},{"name":"LLM","optional":true},{"name":"Python","optional":true}],"status":"live","first_seen_at":"2026-08-26T00:00:00Z","employer_posted_date":"2026-08-26","last_verified_at":"2026-10-21T21:17:28Z","board_verified":true,"closed_at":null,"days_open":56,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":56},"description":"Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology Inc.\nPeople come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip’s nationally-recognizedLeadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the Aggregate System and it’s won us countless awards for diversity and workplace excellence.\nOur company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you.\nVisit our careers page to see what exciting opportunities and company perks await!\nJob Description:\nRole Overview\nYou will be responsible for verifying DDR4/5 memory controllers and AXI input interfaces for IP-level designs, ensuring full protocol compliance, error handling, data integrity and performance computation for high-speed DDR interfaces.\nKey Responsibilities\nDevelop and maintain SystemVerilog UVM-based verification environments for DDR4/DDR5 memory controller and PHY IP.\nDefine verification plans, design testbenches, and create directed and constrained-random testcases.\nWrite and debug testcases and sequences for DDR protocol features (read/write operations, refresh, training, power-down modes).\nValidate ECC, parity, and command/address/data integrity mechanisms.\nDevelop and debug scoreboards, assertions (SVA), and checkers for data integrity and protocol correctness.\nIntegrate AXI, APB VIPs with DDR subsystem.\nPerform coverage analysis (code, functional, assertion) to ensure verification completeness.\nDebug RTL and simulation failures using waveform analysis (SimVision, Verdi).\nWork with design teams to debug RTL and root-cause functional/timing issues in RTL and GLS.\nCollaborate with post-silicon and firmware teams for memory bring-up and validation.\nMentor verification engineers and drive best practices\nTechnical Skills\nStrong knowledge of DDR protocol (JEDEC specifications).\nExperience with SystemVerilog, UVM, and verification methodology.\nHands-on with simulation tools like Synopsys VCS, Cadence Xcelium, or Mentor Questa.\nGood understanding of memory controller architecture and timing parameters (setup/hold, tRCD, tRP, etc.).\nKnowledge of AXI protocol and its integration with DDR controller.\nFamiliarity with assertions (SVA), scoreboarding, and functional coverage.Familiarity with GLS is a plus.\nDrive debug efficiency improvements by leveraging modern methodologies, script automation (Python), and integrating AI/LLM-assisted workflows to accelerate root-cause analysis and triage.\nSoft Skills\nStrong analytical and debugging skills.\nAble to deliver tasks independently.\nGood communication and leadership skills.\nComfortable collaborating across design, validation, and firmware teams.\nRequirements/Qualifications:\nB.E/B.Tech or M.E/ M.Tech in Electronics, Electrical, or Computer Engineering.\n10+ years of experience in SoC or IP-level verification (memory subsystems preferred)\nTravel Time:\n0% - 25%To all recruitment agencies: Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.","description_format":"text","description_chars":4066,"description_truncated":false,"requirements":{"experience_years_min":10,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":null,"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Processors, MCUs & AI Chips","Analog & Power Semiconductors"],"lifecycle":[{"event":"open","at":"2026-10-19T21:52:07Z"}],"visa":[],"liveness":{"score":23,"band":"cold","label":"Long shot","p_open":1,"p_active":0.647,"p_room":0.35,"age_days":56,"expected_fill_days":28,"reasons":["conf:2","velocity","win:tail","comp:brand"],"computed_at":"2026-10-21T05:46:15Z"},"pay":null,"html_url":"https://alion.io/job/microchip-technology-senior-engineer-i-asic-verification","json_url":"https://alion.io/job/microchip-technology-senior-engineer-i-asic-verification.json","meta":{"generated_at":"2026-10-21T21:50:11Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":31077,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-22T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":44188},"rest":"https://alion.io/mcp/rest/get_company?id=44188"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fmicrochip-technology-senior-engineer-i-asic-verification"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fmicrochip-technology-senior-engineer-i-asic-verification"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fmicrochip-technology-senior-engineer-i-asic-verification"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/microchip-technology-senior-engineer-i-asic-verification\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fmicrochip-technology-senior-engineer-i-asic-verification"}]}