{"id":3851334,"url":"https://alion.io/job/microchip-technology-senior-engineer-ii-layout","title":"Senior Engineer II - Layout","company":{"id":44188,"name":"Microchip Technology","domain":"microchip.com","url":"https://alion.io/company/microchip","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"B","score":79,"open_postings":106,"ghost_share":0,"stale_share":0.849,"repost_share":0,"time_to_fill_p50_days":37,"computed_at":"2026-11-08T05:47:12Z"}},"role":"Industrial Engineering","role_family":"Industrial Engineering","seniority":"senior","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["San Jose, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":{"min":70304,"max":205000,"currency":"USD","period":"year","gross":null,"usd_annual":205000},"salary_estimate":null,"experience_years_min":8,"visa_sponsorship":false,"relocation_package":false,"has_equity":true,"technologies":[],"status":"live","first_seen_at":"2026-11-05T00:00:00Z","employer_posted_date":"2026-11-05","last_verified_at":"2026-11-07T05:33:57Z","board_verified":true,"closed_at":null,"days_open":3,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":3},"description":"Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology Inc.\nPeople come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip’s nationally-recognizedLeadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the Aggregate System and it’s won us countless awards for diversity and workplace excellence.\nOur company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you.\nVisit our careers page to see what exciting opportunities and company perks await!\nJob Description:\nJoin the Layout Engineering team as a Senior Engineer II-Layout supporting highly complex semiconductor physical layout, integration, extraction, verification, manufacturability, reliability, and design-closure challenges. This role is best suited for candidates with 7.5-10 years of relevant experience in semiconductor custom or physical layout, analog, digital, mixed-signal, memory, IO, ASIC, SoC, physical verification, or a closely related area.\nIn this role, you will integrate highly complex layout, circuit, technology, reliability, manufacturing, risk, and cross-functional technical decisions within approved scope, partner with circuit design, physical design, verification, technology, CAD, product, test, manufacturing, quality, reliability, and leadership teams, and help deliver robust physical implementation, verification closure, manufacturability, reliability, and product outcomes.\nResponsibilities:\nDefine and execute highly complex layout architectures, floorplans, device structures, interconnect, power distribution, matching, shielding, extraction, and verification strategies within approved scope.\nIntegrate circuit, interface, technology, performance, power, area, reliability, manufacturability, design-rule, and schedule requirements.\nResolve critical layout, connectivity, parasitic, matching, coupling, electromigration, physical-verification, integration, or tapeout-readiness issues through structured root-cause leadership.\nEvaluate evidence quality, uncertainty, risks, dependencies, waivers, and alternative approaches; communicate decision-ready recommendations.\nCoordinate cross-functional technical decisions and layout closure within approved scope.\nEstablish reusable layout structures, automation, verification, extraction, design-rule, and release practices.\nReview decision-ready requirements, floorplans, layouts, extracted results, reports, waivers, defects, and release evidence.\nProvide advanced technical guidance while organizational authority remains separately approved.\nRequirements/Qualifications:\nMinimum qualifications: Bachelor’s degree in Electrical Engineering, Electronics Engineering, Computer Engineering, Physics, or a related field with 7.5-10 years of relevant experience in semiconductor layout, custom physical design, analog, digital, mixed-signal, memory, IO, ASIC or SoC layout, floorplanning, device placement, routing, extraction, physical verification, or closely related equivalent experience.\nQualified candidates should demonstrate analytical thinking, semiconductor-layout judgment, geometric and spatial reasoning, structured problem solving, verification discipline, root-cause analysis, technical documentation, evidence-based communication, cross-functional collaboration, quality focus, and the ability to work with complex design rules, schematics, devices, interconnect, parasitics, reliability, manufacturing, and signoff information.\nSuccessful candidates are expected to demonstrate:\nEmployment stability, reliability, and sustained accountability in prior roles.\nEffective teamwork and cross-functional collaboration.\nIntegrity and accuracy in representing qualifications, experience, and credentials.\nPreferred Qualifications:\nExperience with semiconductor custom, analog, digital, mixed-signal, memory, IO, pad, RF, ASIC, or SoC layout.\nExperience with floorplanning, device placement, routing, matching, shielding, power distribution, extraction, DRC, LVS, ERC, antenna, density, reliability, or physical-verification closure.\nExperience with layout and physical-verification tools, scripting, automation, process-design kits, advanced process nodes, or design-for-manufacturing methods.\nMaster’s degree in Electrical Engineering, Electronics Engineering, Computer Engineering, Physics, or a related field.\nTravel Time:\n0% - 25%Physical Attributes:\nFeeling, Handling, Hearing, Seeing, Talking, Works Alone, Works Around OthersPhysical Requirements:\n70% sitting, 15% standing, 15% walking; 100% in doors; Usual business hours.Pay Range:\nWe offer a total compensation package that ranks among the best in the industry. It consists of competitive base pay, restricted stock units, and quarterly bonus payments. In addition to these components, our package includes health benefits that begin day one, retirement savings plans, and an industry leading ESPP program with a 2 year look back feature. Find more information about all our benefits at the link below:Benefits of working at Microchip\nThe annual base salary range for this position, which could be performed in the US, is $70,304-$205,000.**Range is dependent on numerous factors including job location, skills and experience.\nMicrochip Technology Incis an equal opportunity/affirmativeaction employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law.\nFor more information on applicable equal employment regulations, please refer to the Know Your Rights: Workplace Discrimination is Illegal Poster.\nTo all recruitment agencies: Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.","description_format":"text","description_chars":6871,"description_truncated":false,"requirements":{"experience_years_min":8,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":["Restricted stock units","Retirement plans"],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Processors, MCUs & AI Chips","Analog & Power Semiconductors"],"lifecycle":[{"event":"open","at":"2026-11-06T03:28:59Z"}],"visa":[{"country":"US","licensed_sponsor":true,"adverts_offering_sponsorship_24m":0,"sanctioned_now":false,"evidence":"H-1B filings in 12 months: 112 · green card filings: 54","filings_12m":112,"filings_prev_12m":115,"green_card_filings_12m":54,"median_offered_wage_usd":104127,"route":null,"cap_exempt":false,"checked_at":"2026-11-08T10:45:15+00:00","sources":["US Department of Labor: LCA disclosure data (H-1B, H-1B1, E-3)","US Department of Labor: PERM disclosure data (green cards)"],"filings_for_role_12m":0}],"liveness":{"score":63,"band":"ok","label":"Likely open","p_open":1,"p_active":0.632,"p_room":1,"age_days":3,"expected_fill_days":37,"reasons":["conf:24","stale_co","velocity","win:early","comp:brand"],"computed_at":"2026-11-08T05:47:12Z"},"pay":{"stated_usd_annual":205000,"is_top_pay":true},"html_url":"https://alion.io/job/microchip-technology-senior-engineer-ii-layout","json_url":"https://alion.io/job/microchip-technology-senior-engineer-ii-layout.json","meta":{"generated_at":"2026-11-08T12:23:01Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":26370,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-11-09T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":44188},"rest":"https://alion.io/mcp/rest/get_company?id=44188"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fmicrochip-technology-senior-engineer-ii-layout"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fmicrochip-technology-senior-engineer-ii-layout"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fmicrochip-technology-senior-engineer-ii-layout"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/microchip-technology-senior-engineer-ii-layout\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fmicrochip-technology-senior-engineer-ii-layout"}],"agent":{"mcp":"https://alion.io/mcp/jobs","mcp_open":"https://alion.io/mcp/open","next":[{"tool":"get_job","arguments":{"id":3851334}},{"tool":"search_jobs","arguments":{"company":"microchip.com","detail":"compact"}},{"tool":"match_people","arguments":{"job_id":3851334},"note":"people open to offers who fit this vacancy"}],"note":"The same data through MCP tools: https://alion.io/mcp/open needs no sign-in (compact searches, postings, people); https://alion.io/mcp with an Alion account has everything. Docs: https://alion.io/developers"}}