{"id":122724,"url":"https://alion.io/job/micron-technology-dram-layout-engineer-intern","title":"DRAM Layout engineer (Intern)","company":{"id":37,"name":"Micron Technology","domain":"micron.com","url":"https://alion.io/company/micron-technology","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"B","score":78,"open_postings":974,"ghost_share":0.001,"stale_share":0.86,"repost_share":0.001,"time_to_fill_p50_days":31,"computed_at":"2026-10-19T05:45:15Z"}},"role":"Hardware","role_family":"Hardware","seniority":"intern","employment_type":"internship","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Guadalajara, Mexico"],"countries":["MX"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":39000,"max_usd":114000,"period":"year","method":null,"sample_n":3689},"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Siemens Calibre","optional":false},{"name":"C++","optional":true},{"name":"Cadence Virtuoso","optional":true},{"name":"Linux","optional":true},{"name":"Perl","optional":true},{"name":"Python","optional":true},{"name":"Synopsys Fusion Compiler","optional":true},{"name":"Synopsys IC Compiler II","optional":true}],"status":"live","first_seen_at":"2026-08-25T00:00:00Z","employer_posted_date":"2026-08-25","last_verified_at":"2026-10-17T01:11:29Z","board_verified":false,"closed_at":null,"days_open":55,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":55},"description":"Our vision is to transform how the world uses information to enrich life for all.\nMicron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.\nSUMMARY:\nAt Micron, we focus on developing groundbreaking silicon-to-systems solutions. We handle technology development, advanced memory builds, product development, system development, and validation to create world-class memory solutions.\nIn this position, you will collaborate with Micron’s global design, layout, and verification teams to develop high-quality physical layouts for cutting-edge DRAM products. You will gain hands-on experience in semiconductor layout building, physical verification, and industry-standard Electronic Compose Automation (EDA) tools.\nRESPONSABILITIES:\nDesign and Verify All Levels of Analog and Digital Layout\nUse computer aided design software (i.e. Cadence, Calibre, etc.)\nWork with Design Engineers to floor plan and design layout\nUnderstand and follow verification protocols\nApply custom and/or automated layout techniques to design pitch, array, and peripheral layout for digital and analog circuits.\nCollaborate with build engineering to understand layout methodology.\nPossess basic understanding of circuit design and electronics.\nMinimum Qualifications:\nStudent pursuing a bachelor's degree (last 2 semesters preferred) in Electrical Engineering, Electronics Engineering, Mechatronics, Robotics, Nanotechnology, Computer Engineering, or a related field.\nCompleted coursework or academic projects related to microelectronics, semiconductor devices, VLSI, or integrated circuit design.\nBasic understanding of CMOS technology and layout design principles.\nEffective interpersonal and problem-solving abilities.\nPreferred Qualifications:\nStrong interest in semiconductor physical design and memory technologies.\nSelf-motivated, enthusiastic team player with a willingness to learn.\nFamiliarity with Linux environments and scripting basics.\nExposure to EDA tools such as Cadence Virtuoso, Synopsys IC Compiler II, Fusion Compiler, or similar tools is a plus.\nExperience with programming or scripting languages such as Python, Tcl, Perl, C, or C++ is a plus.\nUnderstanding of physical verification concepts (DRC, LVS, ERC) is a plus.\nUsing AI Tools for Design procedures.\n\"The specified role does not encompass the following responsibilities: Finalization of sales agreements or the execution of sales contracts is prohibited. The role also does not carry the authority to make definitive decisions regarding contracts, be it their conclusion or termination. Furthermore, the role is not designed to involve participation in pricing negotiations or the authorization of contracts. These activities fall beyond the permissible duties of the position.\"\nWe are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all. With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities - from the data center to the intelligent edge and across the client and mobile user experience.\nTo learn more, please visit micron.com/careers All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status. To request assistance with the application process and/or for reasonable accommodations, please contact \nMicron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards.\nMicron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.\nAI alert : Candidates are encouraged to use AI tools to enhance their resume and/or application materials. However, all information provided must be accurate and reflect the candidate's true skills and experiences. Misuse of AI to fabricate or misrepresent qualifications will result in immediate disqualification.\nFraud alert: Micron advises job seekers to be cautious of unsolicited job offers and to verify the authenticity of any communication claiming to be from Micron by checking the official Micron careers website in the About Micron Technology, Inc.","description_format":"text","description_chars":4789,"description_truncated":false,"requirements":{"experience_years_min":null,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":true},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Digital Storage","Enterprise Storage Systems","Semiconductor Manufacturing","Memory & Storage Chips"],"lifecycle":[{"event":"open","at":"2026-08-25T00:00:00Z"}],"visa":[],"liveness":{"score":11,"band":"cold","label":"Long shot","p_open":0.9,"p_active":0.327,"p_room":0.36,"age_days":55,"expected_fill_days":31,"reasons":["conf:52","stale_co","urgency","velocity","win:tail","crowd:junior,brand"],"computed_at":"2026-10-19T05:45:15Z"},"pay":null,"html_url":"https://alion.io/job/micron-technology-dram-layout-engineer-intern","json_url":"https://alion.io/job/micron-technology-dram-layout-engineer-intern.json","meta":{"generated_at":"2026-10-19T13:39:41Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":9812,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-20T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":37},"rest":"https://alion.io/mcp/rest/get_company?id=37"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fmicron-technology-dram-layout-engineer-intern"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fmicron-technology-dram-layout-engineer-intern"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fmicron-technology-dram-layout-engineer-intern"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/micron-technology-dram-layout-engineer-intern\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fmicron-technology-dram-layout-engineer-intern"}]}