{"id":407498,"url":"https://alion.io/job/micron-technology-mts-dram-asic-architect","title":"MTS DRAM ASIC Architect","company":{"id":37,"name":"Micron Technology","domain":"micron.com","url":"https://alion.io/company/micron-technology","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"A","score":86,"open_postings":816,"ghost_share":0,"stale_share":0.565,"repost_share":0.004,"time_to_fill_p50_days":46,"computed_at":"2026-10-29T05:49:05Z"}},"role":"Hardware","role_family":"Hardware","seniority":"staff","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Bengaluru, India"],"countries":["IN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":30000,"max_usd":64000,"period":"year","method":"global_role_cell_scaled_by_country","sample_n":646},"experience_years_min":5,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[],"status":"live","first_seen_at":"2026-07-14T00:00:00Z","employer_posted_date":"2026-07-14","last_verified_at":"2026-10-29T05:53:40Z","board_verified":true,"closed_at":null,"days_open":107,"trust":{"level":"ok","repost_count":0,"flags":[],"days_open":107},"description":"Our vision is to transform how the world uses information to enrich life for all.\nMicron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.\nDRAM ASIC Architecture\nRole Overview\nMicron is seeking an experienced architect to drive the definition of next-generation DRAM products incorporating advanced CMOS-based logic die technologies.\nThis role will help define how future DRAM products leverage advanced CMOS logic die technologies to enable higher levels of integration, observability, reliability, power efficiency, security, and system differentiation beyond what is achievable in conventional DRAM-only implementations. The architect will define architectures that leverage advanced logic die capabilities to complement and enhance DRAM functionality across LPDDR, DDR, HBM and future heterogeneous memory solutions.\nThe successful candidate will architect I/O, reliability, manageability, interface, test and system-enhancement functions. The role requires strong collaboration across DRAM design, ASIC architecture, packaging, process technology, product engineering, validation, firmware, and system architecture teams.\nKey Responsibilities\nDefine next-generation DRAM + logic-die architectures, including functional partitioning between DRAM arrays, peripheral circuitry, and advanced CMOS logic die platforms - to optimize performance, power, cost, reliability, and product differentiation.\nIdentify and evaluate system, interface, reliability, test, management, and control functions that may benefit from advanced logic-die implementations; perform architectural tradeoff analysis covering area, power, latency, yield, testability, reliability, and product scalability.\nDefine scalable CMOS logic-die architectures and subsystem solutions using a combination of custom, semi-custom, and standard IP solutions.\nArchitect high-performance interfaces between DRAM die and logic die, including command, data, clocking, synchronization, test, monitoring, and management paths.\nIdentify emerging opportunities & influence roadmaps for advanced memory system capabilities.\nMinimum Qualifications\nBS, MS, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or related discipline with 5+ years of experience in semiconductor architecture, design, or system engineering.\nExperience in one or more of the following areas: DRAM architecture, memory subsystem architecture, ASIC/SoC architecture.\nGood understanding of DRAM architecture including command flows, timing behavior, bank architecture, refresh management, row hammer mitigation, reliability features, and memory subsystem operation.\nExposure to high-speed I/O, PHY architectures, clocking systems, SI/PI considerations, power delivery, thermal design, and/or die-to-die interfaces.\nDemonstrated ability to lead cross-functional technical discussions, develop architectural proposals, and drive tradeoff-based decision making.\nStrong analytical and problem-solving skills.\nAbility to drive architecture tradeoff studies across multiple engineering disciplines.\nExcellent written and verbal communication skills.\nPreferred Qualifications\nExperience with DDR5/DDR6, LPDDR5/LPDDR6, HBM, GDDR, or emerging memory technologies with strong understanding of memory protocols, timing architectures, memory training, calibration, and PHY design.\nExperience evaluating architectural tradeoffs across DRAM die, logic die, advanced packaging, and system-level implementations.\nExperience with die-to-die interconnect technologies including TSV-based architectures, hybrid bonding, 2.5D/3D packaging, stacked-die systems, and advanced memory integration.\nStrong knowledge of CMOS technologies, semiconductor device fundamentals, analog/mixed-signal circuit concepts, and memory interface design.\nUnderstanding of SI/PI, clocking, power delivery, thermal considerations, and heterogeneous integration challenges.\nExperience working with industry standards organizations, customers, or ecosystem partners related to memory technologies.\nExperience with HBM base die architectures, embedded controllers, advanced memory system features, RAS, security, or logic-die-based memory products.\nProven ability to leverage AI-assisted (vibe) coding techniques to improve efficiency or automate design and analysis methodologies\nLeverage AI tools to automate the tools and workflow Applying Artificial Intelligence in workflows to improve build efficiency\nAbout Micron Technology, Inc.\nWe are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich lifefor all. With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities - from the data center to the intelligent edge and across the client and mobile user experience.\nTo learn more, please visit micron.com/careers\nAll qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status.\nTo request assistance with the application process and/or for reasonable accommodations,please \nMicron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards.\nMicron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.\nAI alert : Candidates are encouraged to use AI tools to enhance their resume and/or application materials. However, all information provided must be accurate and reflect the candidate's true skills and experiences. Misuse of AI to fabricate or misrepresent qualifications will result in immediate disqualification.\nFraud alert: Micron advises job seekers to be cautious of unsolicited job offers and to verify the authenticity of any communication claiming to be from Micron by checking the official Micron careers website in the About Micron Technology, Inc.","description_format":"text","description_chars":6503,"description_truncated":false,"requirements":{"experience_years_min":5,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Digital Storage","Enterprise Storage Systems","Semiconductor Manufacturing","Memory & Storage Chips"],"lifecycle":[{"event":"open","at":"2026-09-06T01:26:26Z"}],"visa":[],"liveness":{"score":16,"band":"cold","label":"Long shot","p_open":1,"p_active":0.558,"p_room":0.28,"age_days":107,"expected_fill_days":46,"reasons":["conf:4","stale_co","urgency","velocity","win:tail","crowd:brand"],"computed_at":"2026-10-29T05:49:05Z"},"pay":null,"html_url":"https://alion.io/job/micron-technology-mts-dram-asic-architect","json_url":"https://alion.io/job/micron-technology-mts-dram-asic-architect.json","meta":{"generated_at":"2026-10-29T09:08:48Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":13870,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-30T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":37},"rest":"https://alion.io/mcp/rest/get_company?id=37"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fmicron-technology-mts-dram-asic-architect"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fmicron-technology-mts-dram-asic-architect"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fmicron-technology-mts-dram-asic-architect"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/micron-technology-mts-dram-asic-architect\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fmicron-technology-mts-dram-asic-architect"}],"agent":{"mcp":"https://alion.io/mcp/jobs","mcp_open":"https://alion.io/mcp/open","next":[{"tool":"get_job","arguments":{"id":407498}},{"tool":"search_jobs","arguments":{"company":"micron.com","detail":"compact"}},{"tool":"match_people","arguments":{"job_id":407498},"note":"people open to offers who fit this vacancy"}],"note":"The same data through MCP tools: https://alion.io/mcp/open needs no sign-in (compact searches, postings, people); https://alion.io/mcp with an Alion account has everything. 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