{"id":3428877,"url":"https://alion.io/job/microsoft-senior-logic-design-engineer-3","title":"Senior Logic Design Engineer","company":{"id":18,"name":"Microsoft","domain":"microsoft.com","url":"https://alion.io/company/microsoft","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Eightfold","truth_index":{"grade":"B","score":82,"open_postings":376,"ghost_share":0,"stale_share":0.71,"repost_share":0.008,"time_to_fill_p50_days":29,"computed_at":"2026-10-31T05:58:55Z"}},"role":"Industrial Engineering","role_family":"Industrial Engineering","seniority":"senior","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Hillsboro, United States","Austin, United States","Mountain View, United States","Washington, United States","Raleigh, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":{"min":119800,"max":234700,"currency":"USD","period":"year","gross":null,"usd_annual":234700},"salary_estimate":null,"experience_years_min":5,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Azure","optional":false},{"name":"OneDrive","optional":false},{"name":"Perl","optional":true},{"name":"Python","optional":true},{"name":"Synopsys Design Compiler","optional":true},{"name":"Synopsys Fusion Compiler","optional":true},{"name":"Synopsys SpyGlass","optional":true}],"status":"live","first_seen_at":"2026-10-23T19:57:35Z","employer_posted_date":"2026-10-28","last_verified_at":"2026-10-31T11:18:44Z","board_verified":true,"closed_at":null,"days_open":7,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":7},"description":"OverviewMicrosoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for engineers to help achieve that mission.\nThe Compute Silicon & Manufacturing Engineering (CSME) organization within SCHIE is responsible for design, development, manufacturing and packaging of Microsoft's state-of-the-art computer chips, notably the Azure Cobalt. Our solutions provide sustainable strategic advantages to Microsoft and enable our customers to achieve more.\nAs Microsoft's cloud business continues to grow the ability to deploy new offerings and hardware infrastructure on time, in high volume with high quality and lowest cost is of paramount importance. To achieve this goal, the Silicon Logic Design team is instrumental in defining and delivering operational measures of success for hardware manufacturing, improving the planning process, quality, delivery, scale and sustainability related to Microsoft cloud hardware. We are looking for experienced engineers with a dedicated passion for customer focused solutions, insight and industry knowledge to envision and implement future technical solutions that will manage and optimize the Cloud infrastructure.\nWe are looking for a Senior Logic Design Engineer to join the team designing RTL for a high-performance PCIe Subsystem supporting Azure Cobalt.\n#SCHIE #CSME\nResponsibilities\nThe candidate for this position will be expected and able to complete the following responsibilities:\nBuild a PCIe subsystem composed of multiple IP \nCollaborate with architecture and IP providers to ensure the subsystem meets SOC requirements.\nGrow your micro-architectural knowledge of your own blocks as well as other blocks in the SoC. \nAssess and then refine the implementation for area, power and performance. \nPerform design quality checks such as Synthesis, Lint, CDC, RDC, Low Power Intent, Logic Equivalence. \nUnderstand Dataflow and Clocking requirements and drive solutions for timing critical paths. \nAutomate tasks using scripting for efficiency. \nDelight your customers who receive your deliverable by providing high-quality functional block on schedule and with professional integrity. \nCollaborate with highly energetic cross functional team members with respect and with One Microsoft mentality to establish synergies. \nChallenge the status quo with a growth mindset.\nQualifications\nRequired Qualifications:\nDoctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience \nOR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience \nOR equivalent experience. \n\nOther Requirements:\nAbility to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter. \n\nThis role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations. As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their US. residency or other protected status (e.g., under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the successful candidate’s citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable.\nPreferred Qualifications:\nExperience with high speed PCIe designs and protocols\nExperience with Industry standard interface protocols such as AXI, APB, etc. \nExperience with ARM Fabric IPs\nExperience with IPXACT\nUnderstanding of Computer Architecture fundamentals\nAbility to write scripts using Python, Tcl, Perl etc. \nExperience in EDA tools such as VCS, VCLP, Spyglass Lint, Questa CDC, Fusion Compiler, Design Compiler, Genus\nProficiency with UPF (Low power intent). \nProficiency in clock crossing techniques \nKnowledge of Static Timing Analysis and understanding of timing signoff fundamentals.\nApplied understanding of low power design principles. \nUnderstanding design closure challenges with power and clock domain crossings.\nExperience writing timing constraints, exceptions, and clock constraints; good understanding in SDC commands and TCL constraints\nOrganized and detail-oriented\nGood verbal and written communication skills.\nSilicon Engineering IC4 - The typical base pay range for this role across the U.S. is USD $119,800 - $234,700 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $160,200 - $261,000 per year.\nCertain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here:\nhttps://careers.microsoft.com/us/en/us-corporate-pay\nThis position will be open for a minimum of 5 days, with applications accepted on an ongoing basis until the position is filled.\nMicrosoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. 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