{"id":1282394,"url":"https://alion.io/job/microsoft-signal-and-power-integrity-engineer","title":"Signal and Power Integrity Engineer","company":{"id":18,"name":"Microsoft","domain":"microsoft.com","url":"https://alion.io/company/microsoft","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Eightfold","truth_index":{"grade":"B","score":82,"open_postings":330,"ghost_share":0,"stale_share":0.724,"repost_share":0.003,"time_to_fill_p50_days":29,"computed_at":"2026-10-27T05:46:45Z"}},"role":"Industrial Engineering","role_family":"Industrial Engineering","seniority":"senior","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Raleigh, United States","Washington, United States","Austin, United States","Hillsboro, United States","Mountain View, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":{"min":102100,"max":202200,"currency":"USD","period":"year","gross":null,"usd_annual":202200},"salary_estimate":null,"experience_years_min":5,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Azure","optional":false},{"name":"HPC","optional":false},{"name":"OneDrive","optional":false}],"status":"live","first_seen_at":"2026-08-13T17:16:03Z","employer_posted_date":"2026-10-20","last_verified_at":"2026-10-28T00:41:33Z","board_verified":true,"closed_at":null,"days_open":75,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":75},"description":"OverviewMicrosoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for engineers to help achieve that mission.\nThe Compute Silicon & Manufacturing Engineering (CSME) organization within SCHIE is responsible for design, development, manufacturing and packaging of Microsoft's state-of-the-art computer chips, notably the Azure Cobalt. Our solutions provide sustainable strategic advantages to Microsoft and enable our customers to achieve more.\nAs Microsoft's cloud business continues to grow the ability to deploy new offerings and hardware infrastructure on time, in high volume with high quality and lowest cost is of paramount importance. To achieve this goal, the Silicon Manufacturing and Product Engineering (SMPE) team is instrumental in defining and elivering operational measures of success for hardware manufacturing, improving the planning process, quality, delivery, scale and sustainability related to Microsoft cloud hardware. We are looking for engineers with a dedicated passion for customer focused solutions, insight and industry knowledge to envision and implement future technical solutions that will manage and optimize the Cloud infrastructure.\nWe are looking for a Senior Signal and Power Integrity Engineer to join the team responsible for developing advanced power delivery and signaling solutions for High Performance Computing (HPC) silicon designs. In this role, you will be responsible for driving the completion of SIPI design solutions supporting overall SOC performance interfacing with silicon, packaging, and system design teams.\n#SCHIE #CSME #SMPE\nResponsibilities\nThe candidate for this position will be expected and able to complete the following responsibilities:\nSIPI engineer for compute and AI SoCs and platforms - Implement strategies for end-to-end power delivery design and signal integrity design from Silicon to Package, and linking to Platform to System and Cloud\nDeliver SIPI solutions that meet the HPC demands across the entire system.\nDrive future power and signal integrity solutions for chiplet architecture with advanced packaging and advanced silicon nodes\nDesign, model, and simulate SI and PI (i.e., incl. IP design, voltage regulator, motherboard, CPU package, silicon, and decoupling capacitor solution) for data center processors and corresponding platforms to ensure optimized performance. Performs DC, AC and transient simulation to provide noise, impedance profile of the whole power delivery path and link/electrical simulations to validate I/O performance from platform to silicon.\nWork closely with silicon and platform architects, motherboard and package designers, thermal architects and engineers, and power and performance engineers.\nDrives the execution of architecture solutions across product lines or multiple product groups across teams that account for design trends and future concepts by leveraging cross- functional expertise, industry best practices, and lessons learned from teams working across multiple product lines\nDrives engineering system design decisions that require collaboration between internal and external stakeholders to account for platform-specific technology decisions and develop system models based on current and anticipated feature/design needs and trade-offs.\nQualifications\nRequired Qualifications:\nMaster's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experienceOR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 2+ years technical engineering experience\nOR equivalent experience. \n\nPreferred Qualifications:\nA foundation and expert in the field of Signal and Power Integrity and delivery, System design, IP design with knowledge on product development with minimum 5 years’ experience in design and electrical modelling\nWorking knowledge in the field of end to end system SIPI Design and Architecture\nIndustry knowledge, trends and landscape of technologies to drive development across Silicon-IP, Advanced packaging, Substrate technology, Board technology and Platform design\nInterpersonal skills including written and verbal communication, teamwork, negotiation, and presentation\n5 years’ experience in silicon packaging products development\nExperience with high-speed signal design and/or power integrity modelling for HPC products\nExperience with Foundry Silicon technologies, OSAT technologies and Substrate technologies\nScreening Requirements\nAbility to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.\nThis role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations. As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their US. residency or other protected status (e.g., under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the successful candidate’s citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable.\nSilicon Engineering IC3 - The typical base pay range for this role across the U.S. is USD $102,100 - $202,200 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $133,800 - $219,200 per year.\nCertain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here:\nhttps://careers.microsoft.com/us/en/us-corporate-pay\nThis position will be open for a minimum of 5 days, with applications accepted on an ongoing basis until the position is filled.\nMicrosoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. 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