{"id":3246853,"url":"https://alion.io/job/mitre-lead-fpga-design-engineer","title":"Lead FPGA Design Engineer","company":{"id":37980,"name":"MITRE","domain":"mitre.org","url":"https://alion.io/company/mitre","size_band":"1001-5000","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Phenom","truth_index":null},"role":"Hardware","role_family":"Hardware","seniority":"lead","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Bedford, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":{"min":156400,"max":195500,"currency":"USD","period":"year","gross":null,"usd_annual":195500},"salary_estimate":null,"experience_years_min":8,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"CMake","optional":false},{"name":"Python","optional":false},{"name":"SystemVerilog","optional":false},{"name":"Verilog","optional":false},{"name":"VHDL","optional":false},{"name":"C++","optional":true},{"name":"UVM","optional":true}],"status":"live","first_seen_at":"2026-10-25T19:11:07Z","employer_posted_date":"2026-10-25","last_verified_at":"2026-10-26T11:05:56Z","board_verified":true,"closed_at":null,"days_open":0,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":0},"description":"At MITRE, your passion fuels work that impacts our nation and improves lives. This is where your skills strengthen national security, cybersecurity, health, transportation, and citizen services. We’re a nonprofit engineering, applied research, and advanced technology organization working in the public interest. With objectivity and integrity at our core, we lead federally funded research and development centers for U.S. government agencies - collaborating with industry and academia to deliver integrated, high-impact solutions that advance our nation’s health, security, and prosperity. Our people tackle the toughest technical challenges, supported by competitive benefits, meaningful career development, and a culture of innovation, collaboration, and technical excellence. Choose MITRE for a career with purpose - and help shape the future.MITRE’s Electronic Systems Development Department is seeking exceptional FPGA engineers to help solve some of the nation’s most challenging technical problems. Our engineers work at the forefront of microelectronics innovation, developing advanced prototypes and proof-of-concept systems that directly support national security and critical government missions.\nAs part of a highly collaborative, multidisciplinary team, you will contribute to groundbreaking research and development efforts spanning advanced semiconductor technologies, embedded systems, communications, sensing, and signal processing. Our diverse sponsor portfolio provides exposure to a broad range of impactful technical challenges, including:\nDevelopment of next-generation prototypes leveraging advanced semiconductor process nodes\nHighly integrated, low Size, Weight, Power, and Cost (SWaP-C) platforms for mission-critical applications\nReal-time communication, sensing, and navigation systems utilizing cutting-edge FPGA and Software Defined Radio (SDR) technologies\nAdvanced architectures for high-throughput signal processing and embedded computing\nCollaboration with world-class engineers and researchers on projects of national importance\nRoles & Responsibilities:\nOur team specializes in the rapid design, development, and deployment of advanced embedded systems for sensing, communications, and navigation applications. In this role, you will have the opportunity to:\nArchitect and develop FPGA and SoC solutions using state-of-the-art devices\nLead the design, integration, bring-up, and testing of custom hardware prototypes\nDrive development efforts throughout the design lifecycle, from requirements to concept demonstration\nImplement and optimize advanced algorithms in hardware and software on embedded platforms\nLead project teams and mentor junior engineers\nInterface with sponsors and build relationships for future programs and task\nEvaluate and incorporate emerging technologies into next-generation prototype systems\nBasic Qualifications:\nTypically requires a minimum of 8 years of related experience with a Bachelor’s degree in electrical engineering, computer engineering, or a related field or 6 years and a Master’s degree in electrical engineering, computer engineering, or a related field\nExperience with design background in one or more RTL languages, including VHDL, Verilog, and/or SystemVerilog\nExperience leading RTL design, simulation, synthesis, timing closure, and verification methodologies\nExperience using EDA tool suites from industry leaders such as Cadence, Synopsys, Siemens, AMD (Xilinx), and Intel (Altera).\nExperience designing and deploying solutions using advanced FPGA and SoC devices\nExperience developing and integrating complex embedded hardware systems\nDeep understanding and application of best practices for design, verification, test, and deployment\nExperience integrating third-party IP and using verification IP\nProficiency with scripting and automation tools such as Python, TCL, CMake, or similar\nExperience leading technical efforts and small engineering teams\nExcellent written and verbal communication skills\nExperience working with EDA vendors and third-party IP providers\nMust be eligible to obtain and maintaina Top SecretU.S Government issued Security Clearance. Per the U.S. Government’s eligibility requirements, you must be a U.S Citizen to be considered for a security clearance.\nThis position requires a minimum of 4 days a week on-site\nPreferred Qualifications:\n\nActive Secret or Top Secret DoW clearance\nExperience working directly with sponsors and managing project execution within national security programs\nExperience with advanced reconfigurable SoC platforms, including AMD Xilinx MPSoC, RFSoC, Versal, and Intel Agilex SoC devices\nExpertise spanning the complete digital design lifecycle, including architecture, implementation, verification, testing, documentation, and configuration management\nStrong understanding of processor interfaces, memory-mapped architectures, and interrupt-driven systems\nKnowledge of microelectronics, digital circuits, and transistor-level design concepts\nDemonstrated leadership in verification methodologies, including UVM and OVM\nThis requisition requires the candidate to have a minimum of the following clearance(s):\nNoneThis requisition requires the hired candidate to have or obtain, within one year from the date of hire, the following clearance(s):\nTop SecretSalary compensation range and midpoint:\n$156,400 - $195,500 - $234,600 AnnualWork Location Type:\nOnsiteIt is unlawful in Massachusetts to require or administer a lie detector test as a condition of employment or continued employment. An employer who violates this law shall be subject to criminal penalties and civil liability.\nCommitment to Non-Discrimination\nAll qualified applicants will receive consideration for employment without regard to disability, status as a protected veteran or any other status protected by applicable federal, state, local or international law.\nMITRE intends to maintain a website that is fully accessible to all individuals. If you are unable to search or apply for jobs and would like to request a reasonable accommodation for any part of MITRE’s employment process, please email  for general support and  for intern positions. This service is for individuals requiring reasonable accommodation requests. Please note that vendor solicitations will not receive a reply.\nBenefits information may be found here.\nCopyright © 1997-2026, The MITRE Corporation. All rights reserved. MITRE is a registered trademark of The MITRE Corporation. Material on this site may be copied and distributed with permission only.","description_format":"text","description_chars":6588,"description_truncated":false,"requirements":{"experience_years_min":8,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":true,"languages":[]},"benefits":[],"hiring_locations":[{"name":"United States","iso":"US","kind":"country"}],"hiring_excludes":[],"relocation_offered":false,"industries":["Space & Aerospace","National Security","Homeland Security"],"lifecycle":[{"event":"open","at":"2026-10-25T19:11:07Z"}],"visa":[],"liveness":{"score":86,"band":"hot","label":"Hiring now","p_open":1,"p_active":0.86,"p_room":1,"age_days":0,"expected_fill_days":29,"reasons":["conf:3","win:early","comp:brand"],"computed_at":"2026-10-26T05:57:25Z"},"pay":{"stated_usd_annual":195500,"is_top_pay":false},"html_url":"https://alion.io/job/mitre-lead-fpga-design-engineer","json_url":"https://alion.io/job/mitre-lead-fpga-design-engineer.json","meta":{"generated_at":"2026-10-26T12:17:36Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":16725,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-27T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":37980},"rest":"https://alion.io/mcp/rest/get_company?id=37980"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fmitre-lead-fpga-design-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fmitre-lead-fpga-design-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fmitre-lead-fpga-design-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/mitre-lead-fpga-design-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fmitre-lead-fpga-design-engineer"}]}