Инженер-разработчик ПЛИС

Moscow Technical University of Communications and Informatics • Russian: C1 • Bachelor's Degree • MATLAB • SystemVerilog • Verilog • 1 day ago
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Salary
$35k – $42k per year (gross)
Location
In office (Moscow)
Seniority
Junior · 2+ years exp
Employment
Full-Time
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Moscow Technical University of Communications and Informatics

Moscow Technical University of Communications and Informatics (MTUCI) is a major Russian higher education institution specializing in telecommunications, information technology, radio engineering, and cybersecurity. Founded in 1921 and based in Moscow, the university provides secondary vocational, undergraduate, and postgraduate degree programs combined with applied research in emerging fields like 5G networks, artificial intelligence, and quantum communications. Operating under the Ministry of Digital Development, Communications and Mass Media of the Russian Federation, it maintains close partnerships with leading technology and telecom corporations to prepare specialized engineering personnel.
mtuci.ru • Moscow • UTC+03:00 • Education • Higher Education

Обязанности:

· Разработка и верификация цифровых устройств на основе ПЛИС (FPGA) для спутниковых систем связи.

· Участие во всем жизненном цикле проекта: от анализа требований и разработки архитектуры до реализации, отладки на стенде и сопровождения.

· Написание HDL-кода для реализации алгоритмов ЦОС и различных интерфейсов.

· Создание unit-тестов, скриптов для автоматизации.

· Взаимодействие со смежными командами: разработчиками программного обеспечения, схемотехниками, системными инженерами.

Мы ожидаем от кандидата:

· Высшее техническое образование (радиотехника, электроника, вычислительная техника, физика).

· Опыт разработки под ПЛИС от 2-х лет.

· Знание синтезируемого подмножества языка описания аппаратуры Verilog, SystemVerilog.

· Опыт работы в САПР ISE и VIVADO.

· Опыт написания тестбенчей и верификации в среде ModelSim.

· Умение работать с осциллографом, анализатором протоколов и другим лабораторным оборудованием для отладки на плате.

· Понимание основ алгоритмов ЦОС.

Будет преимуществом:

· Опыт работы с интерфейсами (DDR3, USB, Ethernet).

· Глубокие знания алгоритмов ЦОС (FFT, DDC, модуляция и т.д.). Владение MatLab для их отладки.

· Знание методологии верификации UVM.

График работы: 5/2 После испытательного срока готовы предложить гибридный график работы по согласованию с руководителем.

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