{"id":3271462,"url":"https://alion.io/job/multicorewareinc-llvm-back-end-engineer","title":"LLVM Back-end Engineer","company":{"id":1764592,"name":"MulticoreWare","domain":"multicorewareinc.com","url":"https://alion.io/company/multicorewareinc","size_band":null,"is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Zoho Recruit","truth_index":null},"role":"Backend","role_family":"Backend","seniority":null,"employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Chennai, India"],"countries":["IN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":null,"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"C++","optional":false},{"name":"LLVM","optional":false}],"status":"live","first_seen_at":"2026-08-30T00:00:00Z","employer_posted_date":"2026-08-30","last_verified_at":"2026-10-29T22:31:49Z","board_verified":true,"closed_at":null,"days_open":60,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":60},"description":"We\nare looking for an experienced LLVM Backend Engineer to design and implement\nbackend components of the compiler toolchain. The role focuses on building and\noptimizing the code generation flow targeting a custom or existing hardware\narchitecture. The candidate will work on LLVM IR transformations, instruction\nselection, and target-specific optimizations to deliver high-performance,\nefficient compiled code.\nResponsibilities:\nDevelop and maintain the LLVM backend for a\ncustom or existing target architecture.\nImplement and extend instruction selection,\nregister allocation, scheduling, and code emission.\nDesign and implement IR-level optimization passes\nto improve performance, memory efficiency, and code quality.\nWork on LLVM middle-end transformations and\noptimizations.\nAnalyze and tune generated assembly/code quality\nfor performance bottlenecks.\nCollaborate with hardware teams to ensure\narchitectural features are fully leveraged by the compiler backend.\nContribute to internal LLVM forks or upstream\nwhere applicable.\nRequirements\nEducation:\nBTech/BE/MTech/ME/MS/PhD in Computer Science, Computer Engineering,\nElectronics/ECE, or a related field.\nTechnical Skills (Must haves):\nStrong C/C++ programming skills and solid\nunderstanding of compiler fundamentals.\nHands-on experience with LLVM, LLVM IR, and\nbackend/code-generation components.\nUnderstanding of instruction selection, register\nallocation, instruction scheduling, and code emission.\nExperience with compiler optimizations and\nperformance/code-quality analysis.\nNeed to have (Can be bridged):\nExperience developing or modifying LLVM backend\ncomponents for a target architecture.\nKnowledge of IR-level and middle-end\ntransformations and optimization passes.\nAbility to analyze generated assembly and\nidentify performance bottlenecks.\nGood to have (Not essential):\nExperience with custom hardware architectures,\naccelerators, CPU/GPU/DSP/FPGA targets, or domain-specific architectures.\nExperience contributing to upstream LLVM or\nmaintaining an internal LLVM fork.\nFamiliarity with compiler testing, benchmarking,\nand performance tuning workflows.\nPreferred Qualifications (Optional):\nExperience collaborating closely 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