{"id":1578795,"url":"https://alion.io/job/neurealm-design-verification-engineer","title":"Design Verification Engineer","company":{"id":59455,"name":"Neurealm","domain":"neurealm.com","url":"https://alion.io/company/neurealm","size_band":null,"is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":null,"truth_index":null},"role":"Hardware","role_family":"Hardware","seniority":"senior","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Bengaluru, India","Kochi, India","Chennai, India","Pune, India"],"countries":["IN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":18500,"max_usd":45000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":13},"experience_years_min":5,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Perl","optional":false},{"name":"Python","optional":false},{"name":"SystemVerilog","optional":false},{"name":"UVM","optional":false},{"name":"Linux","optional":true},{"name":"Unix","optional":true},{"name":"Verilog","optional":true}],"status":"live","first_seen_at":"2026-10-01T11:36:14Z","employer_posted_date":null,"last_verified_at":"2026-10-01T11:36:14Z","board_verified":false,"closed_at":null,"days_open":10,"trust":{"level":"not_scored","repost_count":null,"flags":[],"days_open":10},"description":"Design Verification Engineer : \n\nExperience : 5 - 8 Years\n\nLocation : Bangalore / Kochi / Chennai / Pune\n\nJob Type : Full-time\n\nAbout the Role : \n\nWe are looking for a skilled Design Verification Engineer with hands-on experience in live semiconductor/SoC verification projects. The ideal candidate should have strong expertise in SystemVerilog and UVM, functional verification methodologies, protocol verification, and debugging.\n\nKey Responsibilities : \n\n- Develop and maintain functional verification environments using SystemVerilog and UVM.\n\n- Build and enhance verification components including monitors, checkers, scoreboards, drivers, sequences, and assertions.\n\n- Develop constrained-random stimulus and functional coverage models to achieve verification goals.\n\n- Work extensively with AMBA bus protocols and ARM-based CPU architectures.\n\n- Contribute to verification of PCI Express and/or Ethernet protocols, where applicable.\n\n- Debug RTL, simulation, and verification environment issues and identify root causes.\n\n- Collaborate with RTL, architecture, design, and system teams to resolve functional issues.\n\n- Develop scripts using Python, Perl, Shell, or Makefile to automate verification workflows.\n\n- Participate in regression analysis, coverage closure, and bug tracking.\n\n- Maintain verification documentation, dashboards, and project-level reports.\n\nRequired Skills : \n\n- 5 - 8 years of hands-on experience in Design Verification.\n\n- Strong knowledge of SystemVerilog and UVM with practical live-project experience.\n\n- Good understanding of AMBA protocols such as AXI/AHB/APB.\n\n- Experience with ARM CPU architecture/verification.\n\n- Knowledge of PCIe and/or Ethernet protocols is desirable.\n\n- Experience developing verification environments, monitors, scoreboards, checkers, assertions, and coverage models.\n\n- Good understanding of constrained-random verification and functional coverage.\n\n- Proficiency in Unix/Linux environments.\n\n- Familiarity with configuration management, bug tracking, and verification dashboarding tools.\n\n- Strong debugging and problem-solving skills.\n\n- Working knowledge of Python/Perl/Shell/Makefile scripting.\n\nPreferred Skills : \n\n- Experience with complex SoC/IP verification.\n\n- Exposure to coverage-driven verification and regression automation.\n\n- Experience with industry-standard simulation and verification tools.\n\n- Strong communication and collaborative skills\nSkills\nSystem Verilog, UVM, Verification, AMBA, ARM, Design Verification, Verilog","description_format":"text","description_chars":2503,"description_truncated":false,"requirements":{"experience_years_min":5,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":null,"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Artificial Intelligence","Information Technology","IT Outsourcing & Dedicated Teams","AI Agents"],"lifecycle":[{"event":"open","at":"2026-10-01T12:00:00Z"}],"visa":[],"liveness":{"score":79,"band":"hot","label":"Hiring now","p_open":1,"p_active":0.832,"p_room":0.945,"age_days":10,"expected_fill_days":22,"reasons":["seen:10","velocity","win:mid"],"computed_at":"2026-10-12T06:55:09Z"},"pay":null,"html_url":"https://alion.io/job/neurealm-design-verification-engineer","json_url":"https://alion.io/job/neurealm-design-verification-engineer.json","meta":{"generated_at":"2026-10-12T07:08:49Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":11504,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-13T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":59455},"rest":"https://alion.io/mcp/rest/get_company?id=59455"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fneurealm-design-verification-engineer"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fneurealm-design-verification-engineer"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fneurealm-design-verification-engineer"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/neurealm-design-verification-engineer\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fneurealm-design-verification-engineer"}]}