{"id":2767406,"url":"https://alion.io/job/neurealm-rtl-design-engineer-2","title":"RTL Design Engineer","company":{"id":59455,"name":"Neurealm","domain":"neurealm.com","url":"https://alion.io/company/neurealm","size_band":null,"is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":null,"truth_index":null},"role":"Hardware","role_family":"Hardware","seniority":"senior","employment_type":null,"work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Bengaluru, India","Kochi, India","Chennai, India","Pune, India"],"countries":["IN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":17500,"max_usd":45000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":18},"experience_years_min":5,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Verilog","optional":false},{"name":"VHDL","optional":false}],"status":"live","first_seen_at":"2026-10-01T11:33:47Z","employer_posted_date":null,"last_verified_at":"2026-10-01T11:33:47Z","board_verified":false,"closed_at":null,"days_open":24,"trust":{"level":"not_scored","repost_count":null,"flags":[],"days_open":24},"description":"RTL Design Engineer\n\nExperience : 5 - 8 Years\n\nLocation : Bangalore / Kochi / Chennai / Pune\n\nJob Type : Full-time\n\nAbout the Role : \n\nWe are looking for a skilled RTL Design Engineer with hands-on experience in ASIC/SoC design projects. The ideal candidate should have strong expertise in RTL coding, ARM-based SoC architecture, AMBA protocols, synthesis, timing analysis, and design quality checks.\n\nKey Responsibilities : \n\n- Execute RTL design and coding for complex digital designs using Verilog/VHDL.\n\n- Integrate ARM core-based designs into SoCs and ensure seamless interface compatibility.\n\n- Design and integrate interfaces based on AMBA protocols, including AXI, AHB, and APB.\n\n- Perform Lint and CDC analysis and address design issues to ensure robust RTL implementation.\n\n- Work on FPGA-based designs and/or FPGA prototyping for development and validation.\n\n- Participate in ASIC synthesis and Static Timing Analysis (STA) activities.\n\n- Perform equivalency checking between RTL and synthesized/netlist implementations.\n\n- Debug RTL and integration issues and work closely with verification teams to resolve design issues.\n\n- Collaborate with architecture, verification, physical design, and other cross-functional teams.\n\n- Contribute to project milestones, design reviews, and technical discussions.\n\n- Maintain design documentation and coding standards.\n\nRequired Skills : \n\n- 5 - 8 years of hands-on experience in RTL Design / ASIC / SoC Design.\n\n- Strong proficiency in Verilog/VHDL and RTL coding methodologies.\n\n- Good understanding of ARM-based SoC architecture.\n\n- Hands-on experience with AMBA AXI, AHB, and APB protocols.\n\n- Experience with Lint and CDC analysis.\n\n- Understanding of ASIC synthesis and Static Timing Analysis.\n\n- Experience with equivalency checking and design quality methodologies.\n\n- Exposure to FPGA design or FPGA prototyping.\n\n- Strong debugging and problem-solving skills.\n\n- Good understanding of digital design concepts and SoC integration.\n\n- Strong communication and cross-functional collaboration skills.\n\nPreferred Skills : \n\n- Experience working on complex IP/block-level RTL design.\n\n- Exposure to ARM processor subsystems and SoC interconnects.\n\n- Experience with synthesis, timing constraints, and design optimization.\n\n- Knowledge of industry-standard RTL design and EDA tools.\n\nSkills\nRTL, Verilog, VHDL, ASIC, SoC, ARM, RTL Design, Physical Design","description_format":"text","description_chars":2407,"description_truncated":false,"requirements":{"experience_years_min":5,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":null,"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Artificial Intelligence","Information Technology","IT Outsourcing & Dedicated Teams","AI Agents"],"lifecycle":[{"event":"open","at":"2026-10-17T03:17:59Z"}],"visa":[],"liveness":{"score":49,"band":"ok","label":"Likely open","p_open":0.85,"p_active":0.772,"p_room":0.75,"age_days":23,"expected_fill_days":27,"reasons":["seen:23","velocity","win:late"],"computed_at":"2026-10-25T05:49:26Z"},"pay":null,"html_url":"https://alion.io/job/neurealm-rtl-design-engineer-2","json_url":"https://alion.io/job/neurealm-rtl-design-engineer-2.json","meta":{"generated_at":"2026-10-25T19:27:50Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":27643,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-26T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":59455},"rest":"https://alion.io/mcp/rest/get_company?id=59455"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fneurealm-rtl-design-engineer-2"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fneurealm-rtl-design-engineer-2"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fneurealm-rtl-design-engineer-2"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/neurealm-rtl-design-engineer-2\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fneurealm-rtl-design-engineer-2"}]}