{"id":378953,"url":"https://alion.io/job/nvidia-dpu-performance-validation-engineer","title":"DPU Performance Validation Engineer","company":{"id":6,"name":"NVIDIA","domain":"nvidia.com","url":"https://alion.io/company/nvidia","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"B","score":83,"open_postings":823,"ghost_share":0.026,"stale_share":0.599,"repost_share":0.055,"time_to_fill_p50_days":40,"computed_at":"2026-11-07T05:47:08Z"}},"role":"Industrial Engineering","role_family":"Industrial Engineering","seniority":"middle","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Yokneam, Israel","Tel Aviv, Israel"],"countries":["IL"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":83000,"max_usd":182000,"period":"year","method":"global_role_cell_scaled_by_country","sample_n":5668},"experience_years_min":3,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"C++","optional":false},{"name":"Cadence Palladium","optional":false},{"name":"Linux","optional":false},{"name":"Python","optional":false},{"name":"Siemens Veloce","optional":false}],"status":"live","first_seen_at":"2026-08-31T00:00:00Z","employer_posted_date":"2026-08-31","last_verified_at":"2026-11-07T07:38:30Z","board_verified":true,"closed_at":null,"days_open":68,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":68},"description":"We are hiring a skilled DPU Performance Validation Engineer for our DPU product lines. This includes chip architecture performance characterization, debug, and validation across single-die and multi-die systems. Working in the Network Silicon Engineering group, you will be responsible for debugging, analyzing, and validating performance and functional behavior of current and future NVIDIA silicon devices. You will collaborate with Chip Design, Verification, FW, and Architecture teams to ensure successful product development with bold product cycles. The qualified candidate should be comfortable working in Simulation and Emulation environments, with strong skills in RTL-level debug, waveform analysis, and system-level performance root cause analysis.\nWhat you will be doing:\nLearn and analyze system-level operation of NVIDIA DPUs\nDebug and root-cause performance issues in pre-silicon environments, across RTL, waveform traces, and multi-die system simulations.\nCollaborate closely with design, verification, architecture, and performance modeling teams to isolate and fix issues.\nDevelop and improve validation methodologies for performance experiments and data collection.\nAutomate repetitive debug and validation tasks to scale coverage and efficiency. \nWhat we need to see:\nB.Sc. in Electrical Engineering, Computer Engineering, or equivalent\n3+ years of experience in ASIC development/validation.\nStrong background in ASIC debug, including reading RTL, analyzing waveforms, and root-causing functional or performance issues.\nHands-on experience with performance validation and analysis at the system level (die-level or multi-die systems).\nProficiency with Python and C/C++ in a Linux environment.\nExcellent interpersonal skills and ability to work optimally as part of a multi-functional team. \nWays to stand out from the crowd:\nShown expertise in performance modeling, traffic generation, or architecture studies.\nExperience with modern interconnects and protocols (e.g., PCIe, Ethernet, CHI).\nFamiliarity with emulation platforms (e.g., Palladium, Veloce, FPGA prototyping).\nPassion for experimental work, data-driven validation, and creative problem solving. \nNVIDIA is widely considered to be one of the technology world’s most desirable employers with some of the most forward-thinking, inventive, and hardworking people working here - we need your help to build our future. Are you creative, high-reaching, and love challenges? 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