Salary
≈ $131k – $288k per year (Estimated)
Location
In office (Tel Aviv)
Seniority
Senior · 5+ years exp
Employment
Full-Time
Overview
Company
Impact
Profile match
NVIDIA is an American technology company founded in 1993 that invented the graphics processing unit and has become the dominant supplier of accelerated computing platforms for artificial intelligence. Its portfolio spans data centre GPUs and systems built on the Hopper and Blackwell architectures, GeForce consumer graphics, automotive and robotics platforms, high-speed networking acquired with Mellanox, and the CUDA software stack that binds the ecosystem together. Headquartered in Santa Clara, California, the company sells to cloud providers, enterprises, research institutions and gamers worldwide and is one of the most valuable listed businesses on the Nasdaq.
NVIDIA's Switch ASIC group is seeking a top-tier ASIC technical manager to lead the development of our next-generation ASICs. Join us in shaping the future of technology! As an ASIC Project Lead, you will manage the pre-silicon development of NVIDIA's most advanced and complex switch ASICs - from concept to tape-out - and drive the chip through power-on and qualification to production release. You will collaborate with a cross-disciplinary team, interacting with unit-level ASIC, Physical Design, CAD, Package Design, Firmware & Software, DFT, System Design, Analog Design, and other specialized teams.
What you'll be doing:
- Development Management: Lead the ASIC development from concept and architecture stages through micro-architecture, design, verification, and physical design until tape-out.
- Post-Silicon Execution: Drive chip power-on, bring-up, and qualification to production release.
- Execution Plans: Define and implement execution plans in collaboration with cross-discipline leaders in unit-level, full-chip, physical design, and firmware/software emulation.
- Roadmap Definition: Contribute to the definition of NVIDIA's switch ASIC roadmap.
What we need to see:
- BS or MS in Computer or Electrical Engineering, or equivalent experience.
- 10+ overall years of experience in chip design.
- 5+ years of chip design/verification management experience as a second- or third-level manager, leading organizations of 50+ engineers.
- Proficiency in RTL design (Verilog), verification (UVM, SystemVerilog), System-On-Chip design/integration flow, and design automation.
- Strong system view with the ability to collaborate across multiple interfaces.
- Strong analytical and problem-solving skills.
- Excellent communication and teamwork abilities.
- Experience in synthesis and physical design is a plus.
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