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Salary
≈ $79k – $196k per year (Estimated)
Location
In office (Tel Aviv, Yokneam)
Seniority
Junior · 2+ years exp
Employment
Full-Time

Confirmed on the employer's own hiring board on Oct 22, 2026. First seen by Alion on Oct 20, 2026. NVIDIA scores B on the Alion truth index.

Overview
Company
Impact
Profile match
NVIDIA is an American technology company founded in 1993 that invented the graphics processing unit and has become the dominant supplier of accelerated computing platforms for artificial intelligence. Its portfolio spans data centre GPUs and systems built on the Hopper and Blackwell architectures, GeForce consumer graphics, automotive and robotics platforms, high-speed networking acquired with Mellanox, and the CUDA software stack that binds the ecosystem together. Headquartered in Santa Clara, California, the company sells to cloud providers, enterprises, research institutions and gamers worldwide and is one of the most valuable listed businesses on the Nasdaq.

NVIDIA is seeking a Physical Verification Engineer to help ensure our ASIC and SoC designs are clean, correct, and ready for tapeout. This role focuses on physical verification quality across layout data, connectivity, and manufacturing rule compliance. You will work closely with physical design, custom layout, and methodology teams to run verification flows, debug issues, and improve signoff robustness. This is an excellent opportunity for an engineer who enjoys detailed analysis and high-impact signoff work.

What you’ll be doing:

  • Run and analyze physical verification checks such as DRC, LVS, and other tapeout-quality signoff checks.
  • Debug physical verification violations and partner with design teams to drive clean closure.
  • Review layout, netlist, and runset interactions to identify root causes and recommend fixes.
  • Support full-chip and block-level verification readiness across implementation milestones.
  • Improve physical verification flow quality, turnaround time, and automation.
  • Collaborate with methodology, CAD, and foundry-facing teams on rule interpretation and signoff quality.

What we need to see:

  • B.Sc. or M.Sc. in Electrical Engineering, Computer Engineering, or equivalent experience.
  • 2+ years of experience in physical verification, backend implementation, or VLSI signoff.
  • Strong understanding of DRC, LVS, antenna, and layout verification concepts.
  • Hands-on experience with tools such as Calibre, ICV, Pegasus, or equivalent physical verification tools.
  • Ability to debug verification issues across layout, extracted views, and netlist connectivity.
  • Scripting ability in Tcl, Perl, Python, or shell for automation and debug.
  • Strong collaboration skills and attention to detail.

Ways to stand out from the crowd:

  • Experience with advanced-node signoff and foundry rule decks.
  • Familiarity with stream-out/OASIS or GDSII generation and tapeout readiness flows.
  • Experience improving PV automation, dashboards, or regression infrastructure.

Widely considered to be one of the technology world’s most desirable employers, NVIDIA offers highly competitive salaries and a comprehensive benefits package. As you plan your future, see what we can offer to you and your family www.nvidiabenefits.com/

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