{"id":579438,"url":"https://alion.io/job/nvidia-principal-eda-rd-engineer","title":"Principal EDA R&D Engineer","company":{"id":6,"name":"NVIDIA","domain":"nvidia.com","url":"https://alion.io/company/nvidia","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"B","score":84,"open_postings":821,"ghost_share":0.023,"stale_share":0.56,"repost_share":0.054,"time_to_fill_p50_days":40,"computed_at":"2026-11-06T05:58:05Z"}},"role":"Hardware","role_family":"Hardware","seniority":"lead","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Santa Clara, United States","Westford, United States","Austin, United States","Hillsboro, United States","United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":{"min":232000,"max":368000,"currency":"USD","period":"year","gross":null,"usd_annual":368000},"salary_estimate":null,"experience_years_min":15,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"AI Agents","optional":false},{"name":"AutoGen","optional":false},{"name":"C++","optional":false},{"name":"CrewAI","optional":false},{"name":"Formal Verification","optional":false},{"name":"Function Calling","optional":false},{"name":"LangChain","optional":false},{"name":"Multi-Agent Systems","optional":false},{"name":"Prompt Engineering","optional":false},{"name":"Reinforcement Learning","optional":false},{"name":"SystemVerilog","optional":false},{"name":"Verilog","optional":false},{"name":"VHDL","optional":false}],"status":"live","first_seen_at":"2026-09-09T20:29:54Z","employer_posted_date":"2026-09-09","last_verified_at":"2026-11-06T05:45:11Z","board_verified":true,"closed_at":null,"days_open":57,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":57},"description":"NVIDIA is seeking an experienced Principal EDA R&D Engineer to pioneer the next generation of Hardware Formal Verification tools!\nIn this position, you will lead research, architecture, and development of core formal verification engines improved by Agentic AI frameworks. You will craft collaborative, autonomous AI agent networks to extend formal tools. These tools will automatically break down large builds, coordinate solver strategies, synthesize complex properties, and debug execution traces at an unmatched scale. This role requires deep algorithmic knowledge, rigorous industrial software engineering, and a strong record of producing production-grade EDA tools.\nWhat you'll be doing:\nArchitect, construct, and advance brand new formal verification algorithms (e.g., Model Checking, SAT/SMT solvers, BDDs, Equivalence Checking, and Theorem Proving).\n\nDesign, develop, and deploy multi-agent AI systems (using LLMs, Reinforcement Learning, and Graph Neural Networks) that autonomously analyze RTL topologies, partition large design spaces, and dynamically tune solver parameters.\n\nDevelop intelligent orchestration layers where autonomous AI agents collaborate to bypass state-space explosion, handling multi-billion-gate builds and deep sequential depth.\n\nDevelop intelligent engines capable of handling ingestion, abstraction, and the automatic generation of complex System Verilog Assertions (SVA) from natural language specifications and architectural intent.\n\nDrive features from initial algorithmic research through implementation in high-performance C/C++ environments, ensuring seamless integration into commercial EDA tool suites.\n\nWhat we need to see:\nPh.D. or Master’s degree or equivalent experience in Computer Science, Electrical Engineering, Computer Engineering, or a related quantitative field.\n\nMinimum of 15 years of professional R&D experience specifically building commercial or advanced academic Electronic Design Automation (EDA) hardware verification tools.\n\nDeep mathematical and hands-on understanding of formal methods, including bounded model checking (BMC), unbounded model checking (PDR/IC3), abstract interpretation, and theorem proving.\n\nExpert-level proficiency in C/C++ (Modern C++17/20) passionate about high-performance data structures, memory optimization, and multi-threading.\n\nProven experience building or researching Agentic AI pipelines, multi-agent frameworks (e.g., LangChain, AutoGen, CrewAI), tool-use execution, and prompt-engineering tailored to structured code or hardware descriptions.\n\nExperience with RTL languages (System Verilog, VHDL, Verilog) combined with solid understanding of System Verilog Assertions (SVA).\n\nWays to stand out from the crowd:\nTo distinguish yourself, demonstrate a flawless track record of successfully deploying world-class EDA solutions in high-stakes environments. Showcase any ambitious projects where you have carefully established innovative answers to complex verification challenges. Highlight experiences that reflect your ability to compete at the highest level and deliver outstanding results.\nYour base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 232,000 USD - 368,000 USD.You will also be eligible for equity and benefits.\nApplications for this job will be accepted at least until September 13, 2026.This posting is for an existing vacancy.\nNVIDIA uses AI tools in its recruiting processes.\nNVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. 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