{"id":2750443,"url":"https://alion.io/job/nvidia-senior-asic-design-engineer-noc-ip","title":"Senior ASIC Design Engineer - NOC IP","company":{"id":6,"name":"NVIDIA","domain":"nvidia.com","url":"https://alion.io/company/nvidia","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"B","score":80,"open_postings":792,"ghost_share":0.025,"stale_share":0.712,"repost_share":0.042,"time_to_fill_p50_days":33,"computed_at":"2026-10-21T05:46:15Z"}},"role":"Hardware","role_family":"Hardware","seniority":"senior","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Bengaluru, India"],"countries":["IN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":24000,"max_usd":61000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":18},"experience_years_min":7,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Perl","optional":false},{"name":"Python","optional":false},{"name":"Verilog","optional":false}],"status":"live","first_seen_at":"2026-04-16T00:00:00Z","employer_posted_date":"2026-04-16","last_verified_at":"2026-10-21T15:20:34Z","board_verified":true,"closed_at":null,"days_open":188,"trust":{"level":"stale","repost_count":0,"flags":["stale"],"days_open":188},"description":"NVIDIA is seeking passionate, highly motivated, and creative senior design engineers to be part of its Graphics team working on the design of state of the art memory subsystem components used in their industry-leading Graphics Processors. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of exceptional people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing.\nIn this position, you will be expected to make architectural trade-offs based on features, performance requirements and system limitations, come up with micro-architecture, implement in RTL, and deliver a fully verified, synthesis/timing clean design. You will work with architects, other designers, pre- and post-silicon verification teams, synthesis, timing and backend teams to accomplish your tasks.\nWhat you’ll be doing:\nOwn micro-architecture and RTL development of design modules.\n\nMicro-architect features to meet performance, power and area requirements.\n\nWork with HW architects to define critical features.\n\nCollaborate with verification teams to verify the correctness of implemented features.\n\nCo-operate with timing, VLSI and Physical design teams to ensure design meets timing, interface requirements and is routable.\n\nInteract with FPGA and S/W teams to prototype the design and ensure that S/W is tested.\n\nWork on post-silicon verification and debug.\n\nWhat we need to see:\nBS / MS or equivalent experience.\n\n7+ years of design experience.\n\nExperience in RTL design of complex design units for at least two or three projects.\n\nExposure to design and verification tools (VCS or equivalent simulation tools, debug tools like Debussy, GDB).\n\nDeep understanding of ASIC design flow including RTL design, verification, logic synthesis, prototyping, DFT, timing analysis, floor-planning, ECO, bring-up & lab debug.\n\nExpertise in Verilog.\n\nWays to stand out from the crowd:\nDesign experience in memory subsystem or network interconnect IP.\n\nGood debugging and problem solving skills.\n\nScripting knowledge (Python/Perl/shell).\n\nLeadership experience in leading small 2-3 member teams.\n\nGood interpersonal skills and ability & desire to work as a part of a team.\n\nNVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most brilliant and talented people in the world working for us. If you are creative, autonomous and love a challenge, we want to hear from you.\nWe are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status.","description_format":"text","description_chars":2918,"description_truncated":false,"requirements":{"experience_years_min":7,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":null,"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Processors, MCUs & AI Chips","Servers & Data Center Hardware","Computer Components","AI Chips & Accelerators"],"lifecycle":[{"event":"open","at":"2026-10-16T23:50:30Z"}],"visa":[],"liveness":{"score":6,"band":"cold","label":"Long shot","p_open":1,"p_active":0.223,"p_room":0.28,"age_days":188,"expected_fill_days":33,"reasons":["conf:0","stale_co","velocity","win:tail","crowd:brand"],"computed_at":"2026-10-21T05:46:15Z"},"pay":null,"html_url":"https://alion.io/job/nvidia-senior-asic-design-engineer-noc-ip","json_url":"https://alion.io/job/nvidia-senior-asic-design-engineer-noc-ip.json","meta":{"generated_at":"2026-10-21T21:00:13Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":29844,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-22T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":6},"rest":"https://alion.io/mcp/rest/get_company?id=6"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fnvidia-senior-asic-design-engineer-noc-ip"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fnvidia-senior-asic-design-engineer-noc-ip"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fnvidia-senior-asic-design-engineer-noc-ip"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/nvidia-senior-asic-design-engineer-noc-ip\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fnvidia-senior-asic-design-engineer-noc-ip"}]}