{"id":3874898,"url":"https://alion.io/job/nvidia-senior-digital-design-verification-engineer-hardware-2","title":"Senior Digital Design Verification Engineer - Hardware","company":{"id":6,"name":"NVIDIA","domain":"nvidia.com","url":"https://alion.io/company/nvidia","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"B","score":83,"open_postings":794,"ghost_share":0.025,"stale_share":0.594,"repost_share":0.055,"time_to_fill_p50_days":41,"computed_at":"2026-11-08T05:47:12Z"}},"role":"Hardware","role_family":"Hardware","seniority":"senior","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Santa Clara, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":null,"experience_years_min":5,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"C++","optional":false},{"name":"Cadence Palladium","optional":false},{"name":"SystemVerilog","optional":false},{"name":"UVM","optional":false}],"status":"live","first_seen_at":"2026-11-06T15:56:12Z","employer_posted_date":"2026-11-06","last_verified_at":"2026-11-08T20:35:34Z","board_verified":true,"closed_at":null,"days_open":2,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":2},"description":"We're now looking for a Senior Digital Design Verification Engineer! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI - the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can tackle, and that matter to the world. This is our life’s work, to amplify human imagination and intelligence. Make the choice to join our diverse team today!\nAs a Senior Digital Design Verification Engineer at NVIDIA, you'll verify the design and implementation of our cutting edge SerDes IPs. This ground breaking technology will enable and accelerate gaming, artificial intelligence, deep learning, and autonomous driving. We have put together a best-in-class team that delivers IPs that will be consumed by standard as well as industry-leading proprietary high-speed protocols!\nWhat you’ll be doing:\nDevelop and execute verification plans for SerDes digital designs, golden models, and microarchitecture using SystemVerilog/UVM, simulation, and hardware emulation.\nDevelop, bring up, and debug SerDes verification environments on Cadence Palladium, including preparing designs and testbenches for emulation and running long-duration system scenarios. Run regressions, debug and triage failures, and reproduce issues in simulation when needed to support root-cause analysis and resolution.\nWrite and maintain C/C++ reference models, stimulus generators, checkers, and test code to support simulation and emulation.\nInvestigate failures across RTL, verification infrastructure, C/C++ models, and RNM models, and collaborate with designers to resolve issues.\nWork with architects, digital and analog designers, and pre- and post-silicon verification teams to define verification scope, close coverage, and deliver high-quality IP on schedule.\nWhat we need to see:\nBachelor’s or Master’s degree in Electrical Engineering, Computer Science, or Computer Engineering, or equivalent experience.\nAt least 5 years of relevant design verification experience at the unit, subsystem, or SoC level.\nHands-on experience with Cadence Palladium or a comparable hardware emulation platform, including environment bring-up, regression execution, failure triage, and debug.\nStrong C/C++ programming skills, with experience developing verification models, test infrastructure, or hardware validation tests.\nStrong SystemVerilog skills and experience building verification environments using UVM.\nExperience with constrained-random stimulus, functional coverage, assertions, and coverage closure.\nStrong debugging and analytical skills, including isolating emulation failures and reproducing issues in simulation.\nWays to stand out from the crowd:\nDirect experience bringing up and debugging SerDes IP or subsystems on Cadence Palladium.\nExperience adapting UVM testbenches, C/C++ models, and mixed-signal behavioral models for efficient emulation.\nExperience developing SerDes RNM models and correlating their behavior with analog simulation results or silicon measurements.\nUnderstanding of SerDes architectures, mixed-signal interfaces, calibration, adaptation, and link training.\nExpertise in high-speed protocols such as PCI Express, USB, or SATA.\nYou will also be eligible for equity and benefits.\nApplications for this job will be accepted at least until November 10, 2026.This posting is for an existing vacancy.\nNVIDIA uses AI tools in its recruiting processes.\nNVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.","description_format":"text","description_chars":4094,"description_truncated":false,"requirements":{"experience_years_min":5,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":["Equity"],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Processors, MCUs & AI Chips","Servers & Data Center Hardware","Computer Components","AI Chips & Accelerators"],"lifecycle":[{"event":"open","at":"2026-11-06T15:56:12Z"}],"visa":[{"country":"US","licensed_sponsor":true,"adverts_offering_sponsorship_24m":0,"sanctioned_now":false,"evidence":"H-1B filings in 12 months: 2,856 · green card filings: 799","filings_12m":2856,"filings_prev_12m":1684,"green_card_filings_12m":799,"median_offered_wage_usd":186407,"route":null,"cap_exempt":false,"checked_at":"2026-11-08T10:45:15+00:00","sources":["US Department of Labor: LCA disclosure data (H-1B, H-1B1, E-3)","US Department of Labor: PERM disclosure data (green cards)"],"filings_for_role_12m":937}],"liveness":{"score":63,"band":"ok","label":"Likely open","p_open":1,"p_active":0.632,"p_room":1,"age_days":1,"expected_fill_days":41,"reasons":["conf:6","stale_co","velocity","win:early","comp:brand"],"computed_at":"2026-11-08T05:47:12Z"},"pay":null,"html_url":"https://alion.io/job/nvidia-senior-digital-design-verification-engineer-hardware-2","json_url":"https://alion.io/job/nvidia-senior-digital-design-verification-engineer-hardware-2.json","meta":{"generated_at":"2026-11-08T20:53:47Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":43684,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-11-09T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.1,"usd":0.01,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":6},"rest":"https://alion.io/mcp/rest/get_company?id=6"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fnvidia-senior-digital-design-verification-engineer-hardware-2"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":2,"usd":0.2},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fnvidia-senior-digital-design-verification-engineer-hardware-2"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.1,"usd":0.01},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fnvidia-senior-digital-design-verification-engineer-hardware-2"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/nvidia-senior-digital-design-verification-engineer-hardware-2\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fnvidia-senior-digital-design-verification-engineer-hardware-2"}],"agent":{"mcp":"https://alion.io/mcp/jobs","mcp_open":"https://alion.io/mcp/open","next":[{"tool":"get_job","arguments":{"id":3874898}},{"tool":"search_jobs","arguments":{"company":"nvidia.com","detail":"compact"}},{"tool":"match_people","arguments":{"job_id":3874898},"note":"people open to offers who fit this vacancy"}],"note":"The same data through MCP tools: https://alion.io/mcp/open needs no sign-in (compact searches, postings, people); https://alion.io/mcp with an Alion account has everything. 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