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Salary
≈ $160k – $335k per year (Estimated)
Location
In office (Yokneam)
Seniority
Architect · 8+ years exp
Employment
Full-Time

Confirmed on the employer's own hiring board on Oct 1, 2026. First seen by Alion on Sep 29, 2026. NVIDIA scores A on the Alion truth index.

Overview
Company
Impact
Profile match
NVIDIA is an American technology company founded in 1993 that invented the graphics processing unit and has become the dominant supplier of accelerated computing platforms for artificial intelligence. Its portfolio spans data centre GPUs and systems built on the Hopper and Blackwell architectures, GeForce consumer graphics, automotive and robotics platforms, high-speed networking acquired with Mellanox, and the CUDA software stack that binds the ecosystem together. Headquartered in Santa Clara, California, the company sells to cloud providers, enterprises, research institutions and gamers worldwide and is one of the most valuable listed businesses on the Nasdaq.

We are looking for a Chip Design micro architect for the Networking Silicon group.As a chip micro architect at NVIDIA Networking business unit, you will join a group of passionate engineers to implement the next generation state-of-the-art BlueField DPU SOC and/or ConnectX NIC that deliver breakthrough networking, security, cloud, AI and storage performance to the AI data centers. As a design micro architect, you will make a real impact in a dynamic, technology-focused AI company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!

What you'll be doing:

  • You will be part of a small and exclusive micro-architecture team and have the opportunity to make a real impact in designing the micro-architecture of the next generation state of the art network card hand in hand with the product architect making sure implementation meets the product goals.
  • Work closely with architecture and design teams to thoroughly understand system requirements and identify micro-architecture solutions, while weighing trade-offs related to performance, area and power consumption
  • Break high-level arch requirements into lower-level design building blocks. Focal point for the design team, reviewing implementation and guiding the team.
  • Find bottlenecks early in the development cycle using performance analysis and simulations
  • Use your understanding of the entire chip and system to identify and debug pre and post silicon full-chip issues

What we need to see:

  • B.Sc. in Electrical Engineering or equivalent experience.
  • 8+ years of relevant experience in architecture/micro-architecture.
  • Deep understanding of RTL design including timing, area, power, and complexity considerations
  • Problem solving and analytical skills
  • Ability to document and present requirements to peers and design teams.
  • A team player with strong communication and interpersonal skills.

Ways to stand out from the crowd:

  • Professional RTL design implementation and implementation definition experience.
  • Prior experience of defining a network card and/or Smart NIC SoC, high-speed interconnects, switches.
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