{"id":2779214,"url":"https://alion.io/job/nvidia-senior-package-layout-engineer-2","title":"Senior Package Layout Engineer","company":{"id":6,"name":"NVIDIA","domain":"nvidia.com","url":"https://alion.io/company/nvidia","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"B","score":82,"open_postings":592,"ghost_share":0.019,"stale_share":0.66,"repost_share":0.034,"time_to_fill_p50_days":33,"computed_at":"2026-10-17T05:46:00Z"}},"role":"Hardware","role_family":"Hardware","seniority":"senior","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Hsinchu, Taiwan"],"countries":["TW"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":30000,"max_usd":68000,"period":"year","method":"global_role_cell_scaled_by_country","sample_n":1655},"experience_years_min":5,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Ansys SIwave","optional":false},{"name":"Cadence Sigrity","optional":false},{"name":"Perl","optional":false},{"name":"Python","optional":false}],"status":"live","first_seen_at":"2025-09-05T00:00:00Z","employer_posted_date":"2025-09-05","last_verified_at":"2026-10-18T01:32:53Z","board_verified":true,"closed_at":null,"days_open":408,"trust":{"level":"stale","repost_count":0,"flags":["stale"],"days_open":408},"description":"NVIDIA have some of the most forward-thinking and hardworking people in the world working for us and, due to unprecedented growth, our exclusive engineering teams are rapidly growing. If you're a creative and autonomous engineer with a real passion for technology, we want to hear from you.\nNVIDIA IC Packaging design team is looking for a Senior IC Packaging Design Engineer to join our package team and focus on delivering and designing state of the art high-speed Interconnect systems for Supercomputers and Datacenters. This position will collaborate with Technical Package Lead and cooperation with different design teams and development of complex, detailed layout of IC substrates for NVIDIA products.\nWhat you'll be doing:\nAs part of a Package Layout team, you will collaborate to implement high speed and PDN design for ASIC packages.\n\nDevelop symbols, pad stack and perform substrate package routing, placement, stack-up, reference plane, power distribution using APD or SiP tools.\n\nOptimize package pin out incorporating system level trade-offs of pins assignment.\n\nDevelop methodologies to improve layout environment, productivity, reliability, and schedule considerations.\n\nIn close co-operation with the SI/PI/HW design teams and product teams\n\nPlanning, ensuring stakeholder management and leading projects from start to finish\n\nWhat we need to see:\nB.Sc. Electrical Engineering or any equivalent experience.\n\nMinimum of 5+ years hand-on in Package or/and PCB Layout; including high speed design signal integrity practice; PDN designing and planning\n\nExperience in substrate layout of wire bond and flip chip packages, preferred\n\nKnowledge in substrates or board manufacturing process\n\nSignificant background with APD or SiP and/or other PCB layout tools\n\nEnglish communication skills (written and verbal) are required for this role\n\nWays to stand out from the crowd:\nKnowledge in Ansys (SIwave, HFSS) or Cadence (Sigrity, PowerSI) simulation tools\n\nFamiliarity with Skill language (Cadence) and basic parsing abilities (Python/Perl/Shell-scripting)\n\nWe are committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.","description_format":"text","description_chars":2512,"description_truncated":false,"requirements":{"experience_years_min":5,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[{"language":"English","level":"Upper-Intermediate (B2)","optional":false}]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Processors, MCUs & AI Chips","Servers & Data Center Hardware","Computer Components","AI Chips & Accelerators"],"lifecycle":[{"event":"open","at":"2026-10-17T11:15:56Z"}],"visa":[],"liveness":{"score":5,"band":"cold","label":"Long shot","p_open":1,"p_active":0.192,"p_room":0.28,"age_days":408,"expected_fill_days":33,"reasons":["conf:11","win:tail","crowd:brand"],"computed_at":"2026-10-18T13:17:17Z"},"pay":null,"html_url":"https://alion.io/job/nvidia-senior-package-layout-engineer-2","json_url":"https://alion.io/job/nvidia-senior-package-layout-engineer-2.json","meta":{"generated_at":"2026-10-18T13:17:17Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":19788,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-19T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":6},"rest":"https://alion.io/mcp/rest/get_company?id=6"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fnvidia-senior-package-layout-engineer-2"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fnvidia-senior-package-layout-engineer-2"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fnvidia-senior-package-layout-engineer-2"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/nvidia-senior-package-layout-engineer-2\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fnvidia-senior-package-layout-engineer-2"}]}