{"id":2736149,"url":"https://alion.io/job/nvidia-senior-silicon-validation-methodology-engineer-low-power","title":"Senior Silicon Validation Methodology Engineer - Low Power","company":{"id":6,"name":"NVIDIA","domain":"nvidia.com","url":"https://alion.io/company/nvidia","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"B","score":80,"open_postings":814,"ghost_share":0.023,"stale_share":0.732,"repost_share":0.044,"time_to_fill_p50_days":35,"computed_at":"2026-10-23T05:54:15Z"}},"role":"Hardware","role_family":"Hardware","seniority":"senior","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Shanghai, China"],"countries":["CN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":48000,"max_usd":112000,"period":"year","method":"global_role_cell_scaled_by_country","sample_n":1777},"experience_years_min":8,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[],"status":"live","first_seen_at":"2026-10-16T19:06:27Z","employer_posted_date":"2026-10-16","last_verified_at":"2026-10-23T06:25:12Z","board_verified":true,"closed_at":null,"days_open":6,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":6},"description":"NVIDIA Silicon Co-Design Group (SCG) is a wide-ranging, multi-functional team at NVIDIA. We sit at the crossroads of design, architecture, marketing, operations, and productization. Our contributions span from the architecture stage through final product definition. We architect solutions for Datacenter, Server, Gaming, Robotics, Automotive, and Embedded markets. We are fast-paced, collaborative, and focused on making groundbreaking, impactful products. We are seeking a Senior Silicon Validation Methodology Engineer for Low-Power (LPWR). You will own the department LPWR validation methodology across GPU, SoC, and CPU, from architecture to silicon to product.\nWhat you'll be doing:\nOwn architecture, design, and first-use of end-to-end LPWR validation methodology from silicon to product, covering corners, edge conditions, variability, and real-world scenarios. Set the department standard for LPWR validation so it is reused across a broad array of silicon products.\nDefine what needs to be tested, why, and how - including coverage bounds, PVT/variability, test-time vs. schedule, signoff criteria, milestone playbooks, and SOL(speed of light) expectations.\nInvent and land new LPWR validation approaches that go beyond extending an existing test plan. Challenge current paradigms on performance, power, idle vs. active behavior, and corner-case coverage, and drive the resulting methods, tools, and metrics into org default practice.\nSet LPWR validation strategy and policy across teams, including long-lead items that outlive a single execution cycle. Translate architecture and product goals into multi-generation methodology, infrastructure, and tool investments.\nDrive cross-functional consensus with Architecture, Design, Firmware, and Software under conflicting PPA, coverage, latency, and schedule priorities.\nImprove validation workflow at department scale by building and adopting automation, coverage metrics, pre-silicon to post-silicon correlation, and AI-enabled analysis. Fold learnings back into methodology, spec, and design.\nWhat we need to see:\nA Master's or Bachelor's degree in Electrical Engineering, Computer Engineering, or equivalent experience.\n8+ years of hands-on silicon validation methodology experience, with deep ownership of low-power architecture and design (idle power, power gating, clocking, DVFS, and related features) and silicon features tied to current energy-efficient design.\nProven record of creating new LPWR validation methods, tools, or signoff criteria that were adopted across multiple products or teams.\nExpert debug of silicon LPWR issues, and the ability to deconstruct ambiguous failures into simpler, reusable validation and corrective approaches that raise quality and efficiency for the org.\nDemonstrated strong ability to set validation strategy under hard trade-offs: functionality vs. performance/power, latency vs. coverage, and coverage vs. schedule.\nStrong collaboration skills and Proven track record of influencing and leading cross-functional/group(design, Board, FW, SW) consensus through product launches in low-power domains.\nStrong AI-enabled skills and thinking - use AI to accelerate analysis, exploration, and documentation while maintaining rigor, originality, and judgment that do not come from AI.\nWays to stand out from the crowd:\nSet LPWR or power-management validation policy, playbooks, or signoff bars that other teams ran without you in the critical path.\nHave shipped methodology reuse across multiple chips, SKUs, or platforms, with measurable impact such as higher coverage, fewer debug loops, lower SOL, or faster bring-up.\nIf you are energized by owning a domain, setting the bar for others, and turning low-power silicon expertise into reusable methodology at NVIDIA scale, we'd love to talk to you.","description_format":"text","description_chars":3796,"description_truncated":false,"requirements":{"experience_years_min":8,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Processors, MCUs & AI Chips","Servers & Data Center Hardware","Computer Components","AI Chips & Accelerators"],"lifecycle":[{"event":"open","at":"2026-10-16T19:06:27Z"}],"visa":[],"liveness":{"score":63,"band":"ok","label":"Likely open","p_open":1,"p_active":0.628,"p_room":1,"age_days":6,"expected_fill_days":35,"reasons":["conf:4","stale_co","velocity","win:early","comp:brand"],"computed_at":"2026-10-23T05:54:15Z"},"pay":null,"html_url":"https://alion.io/job/nvidia-senior-silicon-validation-methodology-engineer-low-power","json_url":"https://alion.io/job/nvidia-senior-silicon-validation-methodology-engineer-low-power.json","meta":{"generated_at":"2026-10-23T06:57:38Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","about":"Alion is a live layer of people, companies and AI agents: who they are, whether they are real and active right now, what they do and how to work with them, readable by people and by agents and paid per call.","catalog":"https://alion.io/catalog.json","usage":{"tier":"crawler_verified","counted_by":"address","units_charged":1,"used_today":11270,"day_limit":null,"remaining_today":null,"minute_limit":300,"resets_at":"2026-10-24T00:00:00Z"}},"offers":[{"id":"company.slices","title":"One company in depth, by slice","status":"live","price":{"credits":0.02,"usd":0.002,"plus_per_slice":{"credits":0.05,"usd":0.005}},"unit":"per company, plus each slice with data","note":"the employer in depth","call":{"mcp_tool":"get_company","arguments":{"id":6},"rest":"https://alion.io/mcp/rest/get_company?id=6"},"human":"https://alion.io/catalog?offer=company.slices&for=job%2Fnvidia-senior-silicon-validation-methodology-engineer-low-power"},{"id":"market.stats","title":"A market slice: pay, demand and time to fill","status":"live","price":{"credits":1,"usd":0.1},"unit":"per slice","note":"pay, demand and time to fill for this role and place","call":{"mcp_tool":"market_stats"},"human":"https://alion.io/catalog?offer=market.stats&for=job%2Fnvidia-senior-silicon-validation-methodology-engineer-low-power"},{"id":"job.search","title":"Open jobs by role, technology, place, pay and visa","status":"live","price":{"credits":0.02,"usd":0.002},"unit":"per posting in a list","note":"similar open postings","call":{"mcp_tool":"search_jobs"},"human":"https://alion.io/catalog?offer=job.search&for=job%2Fnvidia-senior-silicon-validation-methodology-engineer-low-power"},{"id":"company.verify","title":"Is this company real and active right now","status":"pilot","price":null,"unit":"per company","request":{"url":"https://alion.io/catalog/request","method":"POST","body":"{\"offer\": \"company.verify\", \"for\": \"job/nvidia-senior-silicon-validation-methodology-engineer-low-power\", \"note\": \"what you need it for\"}"},"human":"https://alion.io/catalog?offer=company.verify&for=job%2Fnvidia-senior-silicon-validation-methodology-engineer-low-power"}]}