{"id":103868,"url":"https://alion.io/job/nxp-high-speed-analog-design-engineer","title":"High Speed Analog Design Engineer","company":{"id":17368,"name":"NXP Semiconductors","domain":"nxp.com","url":"https://alion.io/company/nxp","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"B","score":77,"open_postings":200,"ghost_share":0,"stale_share":0.92,"repost_share":0,"time_to_fill_p50_days":34,"computed_at":"2026-10-17T05:46:00Z"}},"role":"Hardware","role_family":"Hardware","seniority":"middle","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Chandler, United States"],"countries":["US"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":{"min_usd":98000,"max_usd":191000,"period":"year","method":"role_seniority_country_remote_cell","sample_n":568},"experience_years_min":3,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"MATLAB","optional":false},{"name":"Simulink","optional":false},{"name":"Verilog","optional":false}],"status":"live","first_seen_at":"2026-07-23T00:00:00Z","employer_posted_date":"2026-07-23","last_verified_at":"2026-10-17T21:08:53Z","board_verified":true,"closed_at":null,"days_open":87,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":87},"description":"Job Title: Analog Design Engineer\nJob Responsibility:\nDesign high-performance analog and mixed-signal circuits, including: High-speed re-drivers(AFE RX Equalization and Tx output line drivers) and High-speed switches for USB applications, Clocking circuits (PLL, frequency multipliers, Jitter conditioning), High Speed IO designs, Precision analog circuits, cap-less LDOs, and low-voltage bandgaps and charge pumps\n\nHands on circuit design, simulations and documentation from concept to silicon validation\n\nTranslate chip-level requirements(data rate, BER, Jitter budget) into detailed block level architectures and detailed sub-block specifications\n\nDevelop behavioral models (Verilog-A/AMS) for analog blocks to validate architecture performance\n\nPerform system-level modeling (MATLAB/Simulink) for noise and transfer functions\n\nConduct design analysis and hand calculations to predict and validate simulation results\n\nLead and participate in design reviews\n\nPresent technical solutions to internal teams and external customers\n\nCollaborate with layout engineers to ensure optimal device placement, matching, EM/IR compliance, shielding, and guard ring implementation\n\nDrive innovation and propose differentiated technical solutions to meet customer and product requirements\n\nJob Qualification:\nMS in Electrical Engineering with 3-5 years of IC development experience, or PhD with 1-2 years of experience\n\nStrong expertise in high-speed analog circuit design fundamentals including Signal integrity, jitter analysis, noise, bandwidth optimization, Stability and frequency compensation techniques\n\nProven experience in one or more of the following: High-speed interfaces (e.g., SerDes, USB, Ethernet, or similar), Clocking systems (PLL, CDR, frequency synthesis)\n\nHands-on experience with Cadence IC design tools (Virtuoso, Spectre, etc.) and modeling tools such as MATLAB/Simulink\n\nSolid understanding of device physics and parasitic effects impacting high-speed performance\n\nStrong cross-functional collaboration skills with the ability to operate effectively in a global environment\n\nExcellent verbal and written communication skills\n\nFluency in English (spoken and written)\n\nMore information about NXP in the United States...\nNXP is an Equal Opportunity/AffirmativeAction Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, marital status, status as a disabled veteran and/or veteran of the Vietnam Era or any other characteristic protected by federal, state or local law. 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