{"id":1657280,"url":"https://alion.io/job/nxp-semiconductors-analog-ic-layout-engineer-2","title":"Analog IC Layout Engineer","company":{"id":17368,"name":"NXP Semiconductors","domain":"nxp.com","url":"https://alion.io/company/nxp","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"B","score":78,"open_postings":125,"ghost_share":0,"stale_share":0.888,"repost_share":0,"time_to_fill_p50_days":38,"computed_at":"2026-10-02T05:45:00Z"}},"role":"Hardware","role_family":"Hardware","seniority":null,"employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Seoul, South Korea"],"countries":["KR"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":null,"experience_years_min":null,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Cadence Virtuoso","optional":false},{"name":"Linux","optional":false},{"name":"Python","optional":true}],"status":"live","first_seen_at":"2026-10-02T02:08:27Z","employer_posted_date":"2026-10-02","last_verified_at":"2026-10-02T16:32:08Z","board_verified":true,"closed_at":null,"days_open":1,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":1},"description":"About the Team\nNXP Semiconductors is seeking an Analog IC Layout Engineer to join the Central Layout Group serving the Power & Energy Business Line, with a primary focus on Automotive Power Solutions (APS).\nThe Central Layout Group delivers physical implementation expertise for complex mixed-signal and power management integrated circuits supporting multiple product lines worldwide. The team collaborates with Design, Verification, Package, Test and Product Engineering organizations across a global R&D network to develop next-generation automotive and industrial semiconductor solutions.\nRole Summary\nThe successful candidate will contribute to the development of analog and mixed-signal integrated circuits, supporting physical implementation activities from block-level development through product integration. The role offers the opportunity to work within an international and multidisciplinary engineering environment.\nKey Responsibilities\nLayout Development\nDevelop Analog and Mixed-Signal layout blocks from schematic to tape-out\nSupport floorplanning and physical implementation activities\nOptimize layouts for performance, matching, reliability and manufacturability\nContribute to top-level integration activities\nVerification and Quality\nExecute DRC, LVS, ERC and physical verification activities\nSupport parasitic extraction and post-layout analysis\nParticipate in design reviews and sign-off activities\nEnsure high-quality layout deliveries following NXP methodologies\nCross-Functional Collaboration\nCollaborate closely with Analog Design, Verification, Package, Test and Product Engineering teams\nSupport troubleshooting and problem-solving activities during product development\nContribute to continuous improvement of layout methodologies and best practices\nRequired Skills\nBachelor or Master Degree in Electrical Engineering, Electronics, Physics or Microelectronics\nKnowledge of Analog IC Layout methodologies\nExperience with Cadence Virtuoso Layout environment\nUnderstanding of DRC/LVS verification concepts\nFamiliarity with Linux working environments\nStrong analytical and problem-solving skills\nAbility to collaborate effectively in multicultural and international teams\nFluent written and spoken English\nPreferred Qualifications\nExperience with Calibre, PVS or equivalent verification tools\nKnowledge of CMOS, BCD or High Voltage technologies\nKnowledge of Analog Mixed-Signal integrated circuits\nBasic scripting skills (SKILL, Python, TCL or Shell)\nExperience in automotive semiconductor development\nInterest in layout automation and methodology improvements\n More information about NXP in Korea...\n#LI-29ec","description_format":"text","description_chars":2632,"description_truncated":false,"requirements":{"experience_years_min":null,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"master","optional":false},"security_clearance":false,"languages":[{"language":"English","level":"All levels","optional":false}]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Artificial Intelligence","Science & Engineering","Electrical & Electronic Engineering","Analog & Power Semiconductors"],"lifecycle":[{"event":"open","at":"2026-10-02T02:08:27Z"}],"liveness":{"score":63,"band":"ok","label":"Likely open","p_open":1,"p_active":0.632,"p_room":1,"age_days":0,"expected_fill_days":38,"reasons":["conf:3","stale_co","velocity","win:early","comp:brand"],"computed_at":"2026-10-02T05:45:00Z"},"pay":null,"html_url":"https://alion.io/job/nxp-semiconductors-analog-ic-layout-engineer-2","json_url":"https://alion.io/job/nxp-semiconductors-analog-ic-layout-engineer-2.json","meta":{"generated_at":"2026-10-03T03:39:09Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","usage":{"tier":"crawler","counted_by":"address","units_charged":1,"used_today":3661,"day_limit":5000,"remaining_today":1339,"minute_limit":60,"resets_at":"2026-10-04T00:00:00Z"}}}