{"id":1228871,"url":"https://alion.io/job/nxp-semiconductors-lead-sta-engineer","title":"Lead STA Engineer","company":{"id":17368,"name":"NXP Semiconductors","domain":"nxp.com","url":"https://alion.io/company/nxp","size_band":"5000+","is_staffing_agency":false,"employer_type":"direct","is_intermediary":false,"listed_via":null,"ats_vendor":"Workday","truth_index":{"grade":"B","score":79,"open_postings":126,"ghost_share":0,"stale_share":0.857,"repost_share":0,"time_to_fill_p50_days":38,"computed_at":"2026-10-01T05:45:00Z"}},"role":"Industrial Engineering","role_family":"Industrial Engineering","seniority":"lead","employment_type":"full_time","work_mode":"on_site","remote_scope":null,"remote_scope_basis":null,"remote_working_hours":null,"hiring_geo_confidence":"structured","locations":["Bengaluru, India"],"countries":["IN"],"hiring_countries":[],"hiring_countries_total":0,"salary":null,"salary_estimate":null,"experience_years_min":7,"visa_sponsorship":false,"relocation_package":false,"has_equity":false,"technologies":[{"name":"Cadence Tempus","optional":false},{"name":"Perl","optional":false},{"name":"Python","optional":false},{"name":"Synopsys PrimeTime","optional":false}],"status":"live","first_seen_at":"2026-09-25T14:18:21Z","employer_posted_date":"2026-09-25","last_verified_at":"2026-10-01T03:37:13Z","board_verified":true,"closed_at":null,"days_open":5,"trust":{"level":"ok","repost_count":null,"flags":[],"days_open":5},"description":"Summary: Seeking a highly skilled and experienced Lead STA Engineer to lead and execute static timing analysis for complex semiconductor designs, ensuring timing closure and performance targets are met. This role involves guiding a team, developing methodologies, and collaborating with design and verification teams to deliver high-quality products.\nJob Qualification:\nMaster's degree or Bachelor's degree in Electronics/ Electrical Engineering, Computer Engineering, or a related field.\n7+ years of hands-on experience in static timing analysis for complex ASIC/SoC designs.\nExperience of Multi mode timing constraint development, execution, and final timing signoff for advanced technology nodes\nProven experience leading STA efforts for multiple successful tape-outs.\nExpertise in industry-standard STA tools (e.g., Synopsys PrimeTime, Cadence Tempus).\nStrong understanding of digital design fundamentals, clocking architectures, and low-power techniques\nIn-depth knowledge of timing constraints (SDC) and their application.\nProficiency in scripting languages such as Perl, Python, or TCL.\nStrong communication and interpersonal skills, with the ability to collaborate effectively in a global team environment.\nWork closely with Architects,Front End,DFT and the PD team to understand design,clocking,timing ,Requirements and lead the writing constraints and closing timing activities\nKey Responsibilities\n Constraint Development: Create, validate, and maintain Synopsys Design Constraints (SDC) for block and full-chip levels, covering false paths, multicycle paths, and test modes.\n Timing Signoff: Perform exhaustive timing analysis across multiple corners and modes (MCMM), adhering to process, voltage, and temperature (PVT) variations.\n Violation Debugging: Debug and resolve setup, hold, transition, and path-based violations (PBA).\n Optimization & ECO: Drive timing closure by generating and evaluating timing Engineering Change Orders (ECOs).\nCross-functional Collaboration: Partner with RTL, physical design, and DFT teams to ensure robust timing integration and refine timing models.\n Tool & Flow Automation: Develop and support implementation flows using industry-standard Electronic Design Automation (EDA) tools and improve script-based automation.\nDrive a small team of STA engineers.\nShould be able to do IP level synthesis.\n More information about NXP in India...\n#LI-7013","description_format":"text","description_chars":2392,"description_truncated":false,"requirements":{"experience_years_min":7,"management_years_min":null,"team_size_min":null,"manages_managers":false,"education":{"level":"bachelor","optional":false},"security_clearance":false,"languages":[]},"benefits":[],"hiring_locations":[],"hiring_excludes":[],"relocation_offered":false,"industries":["Processors, MCUs & AI Chips","RF & Wireless Hardware","Analog & Power Semiconductors"],"lifecycle":[{"event":"open","at":"2026-09-25T14:18:21Z"}],"liveness":{"score":63,"band":"ok","label":"Likely open","p_open":1,"p_active":0.632,"p_room":1,"age_days":5,"expected_fill_days":38,"reasons":["conf:2","stale_co","velocity","win:early","comp:brand"],"computed_at":"2026-10-01T05:45:00Z"},"pay":null,"html_url":"https://alion.io/job/nxp-semiconductors-lead-sta-engineer","json_url":"https://alion.io/job/nxp-semiconductors-lead-sta-engineer.json","meta":{"generated_at":"2026-10-01T10:38:58Z","cache_seconds":300,"methodology":"https://alion.io/methodology","terms":"https://alion.io/terms","contact":"https://alion.io/contact","api":"https://alion.io/developers","usage":{"tier":"search","counted_by":"address","units_charged":0,"used_today":0,"day_limit":null,"remaining_today":null,"minute_limit":null,"resets_at":"2026-10-02T00:00:00Z"}}}